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HD3SS3202: USB 3.2 x1 bias/ decoupling scheme

Part Number: HD3SS3202

Hello TI Team,

we are designing a device incorporating the HD3SS3202 mux with a retimer from another manufacturer. The signal chain would be:

UFP USB-C connector - HD3SS3202 - Retimer chip

The retimer chip specifies the use of decoupling capacitors on both its USB TX and RX pairs, which means the common mode voltage of the HD3SS3202 TX pairs is not directly biased to any voltage.

To address this I have two questions:

  1.  If we can confirm that the retimer chip common mode voltage is <1.8V, the differential p2p voltage swing is <1V, can we place the AC coupling capacitors between the connector and HD3SS3202 to bias it with the retimer?
  2. If not, what would be the recommended bias resistor and voltage to which USB 3.2 10Gbps pairs can be biased to? In addition to GND, we have 1.2V and 1.8V voltages available.

Thanks in advance!

Daniels

  • Daniels

    1.  If we can confirm that the retimer chip common mode voltage is <1.8V, the differential p2p voltage swing is <1V, can we place the AC coupling capacitors between the connector and HD3SS3202 to bias it with the retimer?
      1. Yes, you can place the AC coupling capacitors between the connector and the HD3SS3202 and let the retimer common mode voltage bias the HD3SS3202.
    2. If not, what would be the recommended bias resistor and voltage to which USB 3.2 10Gbps pairs can be biased to? In addition to GND, we have 1.2V and 1.8V voltages available.
      1. You can use 100k as the pull-up resistor, and bias voltage needs to be between 0 and 2V.

    Thanks

    David