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TL16C750E: The Xon/Xoff interrupt problems

Jason Chen2
Prodigy 50 points
Part Number: TL16C750E

Dear experts,

My application need to avoid writing any data into THR after Xoff is received when software flow control is enabled.

That is I need to monitor the Xoff interrupt and ignore the data passed to THR, then release the machnism after I receive the Xon.

However, this chip seems to assert the interrupt when Xoff is received and deassert it when Xon is received.

My questions are...

1. Why does Xoff interrupt keep asserted before Xon is received? What is the application of Xoff interrupt? It is a little weird, because the interrupt service routine will be always served.

2. Is it possible to monitor the Xon character in my case ?

Best regards,

Jason

  • 0
    TI__Guru 69722 points

    Jason,

    An engineer has been notified of your post and will respond accordingly. Thank you for your patience.

    Regards,

    Eric Hackett

  • +1
    TI__Guru 58260 points
    Jason Chen2 said:
    1. Why does Xoff interrupt keep asserted before Xon is received? What is the application of Xoff interrupt? It is a little weird, because the interrupt service routine will be always served.

    This seems to be how the device was designed (where Xoff is meant to be treated as a high priority to service/check)

    Jason Chen2 said:
    2. Is it possible to monitor the Xon character in my case ?

    Looking at the registers, I don't see a way for you to be able to assert an INT for the Xon received. You may need to continuously poll IIR to see when the Xoff identifier is reset/no longer pending or check the INT to see when it deasserts. 

    -Bobby