• State TI Thinks Resolved
  • Locked Locked
  • Replies 1 reply
  • Answers 1 answer
  • Subscribers 32 subscribers
  • Views 146 views
  • Users 0 members are here
Support feedback
Options
Options
Similar topics

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

DS250DF230: DS250DF230 question

Ekin Yao
Prodigy 10 points
Part Number: DS250DF230

Hi Could you please help to answer my question, thank you very much!

Q1:  The software version is α version or β version? some register is only β version active in DS depiction

Q2:if need configure the CTLE Boost value/EQ Gain/VGA Gain register  at GBE datarate, what is impact with different value? how to configure these register

Q3: what  situation is  0x40~0x53  uesed in  ?  if set to adapt mode 0 , the register is active still?

Q4: What is the function of CTLE bypass? if under bypass mode , is FIR moden not active ?

Q5: the FIR after Driver is also active when use at bypass mode . if active ,wich regiseter need configure?

 our situation is used at GBE datarate , when test the Serder self loop BER testing , the BER is large. if configre the 0x41~0x53 register used following setting , the test is ok ( no bit error with 24HRs)

Is the following configuratio correct?

that'all

thanks

 

Ekin

 

  • 0
    TI__Mastermind 23777 points

    Hi Elkin,

    Ekin Yao said:
    Q1:  The software version is α version or β version? some register is only β version active in DS depiction

    The current device version is the "beta version".

    Ekin Yao said:
    Q2:if need configure the CTLE Boost value/EQ Gain/VGA Gain register  at GBE datarate, what is impact with different value? how to configure these register

    CTLE is used to compensate for pre-channel loss.  At GBE (1.25Gbps), you may not experience much pre-channel loss (compared to 25Gbps).  Also, if you are just using this device for 1.25Gbps, you might also consider one of the DS110DFxxx or DS125DFxxx if they meet your system requirements.  In order to configure the CTLE, please see Table 7-30 in the programming guide.

    Ekin Yao said:
    Q3: what  situation is  0x40~0x53  uesed in  ?  if set to adapt mode 0 , the register is active still?

    These registers are used when CTLE is automatically adapted using one of the adapt modes (1-3).  In adapt mode 0, these registers do not impact device behavior.

    Ekin Yao said:
    Q4: What is the function of CTLE bypass? if under bypass mode , is FIR moden not active ?

    CTLE bypass allows for the device to have very low CTLE boost.  This is useful if there is very little insertion loss prior to the device input so that the signal is not over equalized.  Since the FIR is not related to the CTLE bypass, it remains active when CTLE is bypassed.

    Ekin Yao said:
    Q5: the FIR after Driver is also active when use at bypass mode . if active ,wich regiseter need configure?

    Yes FIR is active in CTLE bypass mode.  To configure, please see section 7.11 in the programming guide.

    Ekin Yao said:
     our situation is used at GBE datarate , when test the Serder self loop BER testing , the BER is large. if configre the 0x41~0x53 register used following setting , the test is ok ( no bit error with 24HRs)

    Which adapt mode are you using?  Are you setting/releasing CDR reset when the BERT signal is introduced to the device?  Setting/releasing CDR reset causes the device to re-adapt to the input signal.

    Ekin Yao said:
    Is the following configuratio correct?

    This should work.

    Thanks,

    Drew