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SN65HVD234: Latch up test per JESD78

Brian Triggs
Prodigy 30 points
Part Number: SN65HVD234

I see in your Quality, reliability & packaging data download for the subject part has passed your Latch up test in accordance with JESD78.  Can you tell me what current level this part was tested to and what is the pulse width if this injected current pulse?  Thanks you!

  • 0
    TI__Guru 50555 points

    Hi Brian,

    I don't have access for qualification reports for a device this old. However, since it is documented that the device passed latchup using the JESD78 standard, we do know which specified current trigger and timing ranges would have been used. This test standard defines a current trigger ±100mA at the pin under test and the pulse width will be between 5µs and 1s depending on the rise time of the pin under test voltage. 

    Let me know if you have any other questions.

    Regards,
    Eric Schott

  • 0 in reply to Eric Schott1
    Prodigy 30 points

    Hi Eric,

    Thanks for the current level, however, can you be more specific on the pulse width that was used for the current pulse?  I found a White Paper on your website (SCAA124, dated April 2015) that talks about TI Latch up testing and it indicates the pulse width is between 2ms and 10 ms (see paragraph 2.1 of the referenced document).  Does this make sense for the subject part number or do you have anything that can pinpoint the actual pulse width used for the qualification?  Thanks, Brian

  • 0 in reply to Brian Triggs
    TI__Guru 50555 points

    Hi Brian,

    Unfortunately, I can only speculate on the actual value used for SN65HVD234. While the test standard defines a wide range of pulse width timings, the primary purpose of the pulse is to create the desired current through the pin under test. The time required to achieve this current will change from device to device and board to board as the different leakage, capacitance, and TVS characteristics differ between tests. As most IC IOs are going to be fairly comparable in respect to these specifications, it makes sense that this app note would mention a more typical range of 2ms to 10ms. 

    Do you need this values in order to recreate the testing for your own evaluation? Or is there a specific pulse width timing with this test spec that is required for your application? 

    Regards,
    Eric Schott