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Hi
I am using the DP83822EVM together with a STM32H7-DK and has configured DP83822EVM via bootstrapping. Reading the registers over MDIO works and the PHY is configured as RMII master with a clock output on COL pin (pin 29). I am using the HAL driver in the STM32H7-DK for Ethernet communication.
I have not gotten it to work though. When i measure the output clock signal it is not behaving as expected.The clock signal has the correct frequency, 50 MHz, but the signal looks like a sine wave and goes from 1V to 2.4V. The behaviour I am expecting is a square wave that goes from 0V to 3.3V. Should the clock signal look like this?
I have also measured the clock signal on the default pin for clock output, RX_D3, pin 7, but that generates the same strange clock signal.
Hi Philip,
Did you modify operation of the PHY by editing registers?
You can not use pin 29 to read clk_out unless you set it superficially via software.
By default you should be able to read clk_out on RX_D3(Pin 27, not pin 29/7) as per datasheet.
Please try the reading again on correct pin and let us know if you still see this.
Best,
Alon
Hi
I have modified the operation of the phy to use pin 29 (COL) as clk_out. That is done by writing to register 0x0463 IOCTRL2 BIT 2:0 to 011: "clock reference according to bits[6:4]" and BIT 6:4 to 100: "RMII Master mode reference clock: 50MHz ". Is this correct and do I have to write to any other registers toconfigure the clk_out?
As I also wrote in my original post: I have tested to not change the clk_out pin and use RX_D3, but this is also generating a clock signal like the one on COL pin.
/Philip
Hi Philip,
Do you get link-up? Have you tried sending and receiving packets?
It is likely you are not probing correctly, can you try using a high impedance probe, and to make you are probing correctly using the correct load.
Best,
Alon
Hi Philip,
I will go ahead and close this forum if there are no further questions.
Please feel free to reach out again with any query.
Best,
Alon