• State Resolved
  • Locked Locked
  • Replies 2 replies
  • Subscribers 34 subscribers
  • Views 356 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TIR1000: Regarding IR_RXD input pulse spec

Shinichi Inoue
Guru 22281 points

Part Number: TIR1000

Dear Specialists,

My customer is considering TIR1000 and has a question.

I would be grateful if you could advise.

---

About 6 pins (IR_RXD) of TIR1000,

The pulse width of the input signal is described as 3/16 clock at datasheet P.3 Pin Functions.

Could you please let us know the maximum and minimum values.

In our case, we use external clock to the 16XCLK, not UART RCLK.

The background is listed below.

The pulse width of IrDA sent from Vishay TFDU4101(IrDA light receiving element) is 4 clock pulses (at 115200bps 1.8432MHz) in actual measurement.

We are considering replacing it with TIR1000 because it exceeds the regulations of Microchip MCP2122 currently in use.

---

I appreciate your great help and cooperation.

Best regards,

Shinichi

  • 0
    TI__Mastermind 26836 points

    Hello Shinichi,

    I understand your question to be whether it is okay for the IR_RXD input to be 4 cycles instead of 3 cycles for an encoded 0.

    Yes, this is okay. In the Feature Description for the data sheet, you can find the following statement: "To code a 0, one pulse is sent or received within a 1-bit time period, or 16 clock cycles. The pulse must be at least 1.6 μs wide and 3 clock cycles long at 1.843 MHz."

    Best,

    Danny

  • 0 in reply to Danny Bacic
    Guru 22281 points

    Hi Danny,

    Thank you for your reply.

    I'll share your answer with the customer.

    When they have an additional question, I consult you again.

    I appreciate your great help and cooperation.

    Best regards,

    Shinichi