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TDES960: I2C programming requirements

Part Number: TDES960

Hello,

I'm trying to programm TDES960 I2C register from  I2C_SCL pin12 and I2C_SDA pin11 pulled by 3.7K to VCC (3.3V).

The PDB pin is pulled to 3.3V by 10K with 10µF capacitor as suggest in 9.2.1.

My problem is I cannot obtain Acknowledge from I2C 7bit address 0x3D B0111101 . VIDX pulled to 1V8.

Is there something else to verify to know if the I2C bus is operational?

Thank you.

Regards.

  • Hey Alexandre,

    Did you calculate the 3.7kOhm value for I2C pullup? We typically recommend 4.7kOhm.

    Thanks,

    Lysny

  • Hello Lysny,

    From datasheet "Chapter Pin Configuration and Functions" "Recommend a 2.2-kΩ to 4.7-kΩ Pullup".

    HW engineer chosen intermediate value. We will try with 4.7KOhm.

    Thank you for your quick reply.

    Regards.

    Alexandre

  • Hey Alexandre,

    Yes, typically we use 2.2k with 1.8V and 4.7k with 3.3V I2C, but there is an app note that is linked in that description that explains when you might use a different value. 

    Please let me know your findings. Slight smile

    Thanks,

    Lysny

  • Hello Lysny,

    I try with 4.7K and it still doesn't work, I try also with FPGA 10K internal pullup (after removing the 4.7K external resistor), idem.

    We also check 3.3V and 1.8V.

    Also the TDES960 is the only I2C peripheral connected to the FPGA. I2C run to 100KHz.

    I have to add TDES960 isn't connected to V3link serializer.

    Thanks for your help.

    Regards

  • Hey Alexandre,

    The other potential is that the IDX address is not being properly set. I saw that you mentioned it is pullup up to 1.8V. Could you verify that it uses a 10kOhm resistor for that?

    If it does, is it possible to probe that pin and check that 1.8V is being received at the pin? The circuit you mentioned for the PDB pin is correct, but if possible, I would also like you to probe that.

    I would also suggest just quickly testing that the FPGA is able to use I2C to communicate to any other device.

    Thanks,

    Lysny

  • Hello Lysny,

    Take for your advice. By checking PDB we have 1.0V before to start the power-supply (this unwanted voltage come from the pcie connector), so we have to fix that point. (The PDB is supplied by 3V3 as noted 3V3 tolerent in the datasheet.

    Then the 25MHz Oscillator do not provide the right frequency (actually 150Hz instead of 25MHz) so we have to fix that too.

    The FPGA can R/W EEPROM from another bus.

    Thanks again for your prompt reply.

    Regards.