SN65MLVD206: VIT+ positive-going threshold when input signal drop

Chi Zhang2

Intellectual 1960 points

Part Number: SN65MLVD206

Hi Expert,

my customer is using SN65MLVD206, there is one question needing your help.

VIT+ in type 2 is 150mV for active positive-going differential threshold. if we meet a real signal in the input, which will have a drop. what will be our positive voltage threshold, still 150mV or higher?

please take this input wave as reference.

this 2nd picture show signal drop from 650mV to 180mV and then back to 380mV, this 180mV drop will make output level opposite or not?

Chi

over 1 year ago

0 Clemens Ladisch over 1 year ago

Guru 265410 points

Any differential input signal of +150 mV or higher is guaranteed to be read as high.
Any differential input signal of +50 mV or lower is guaranteed to be read as low.

All your values are higher than +150 mV, so the output will not change.

0 Joshua Salinas over 1 year ago

TI__Expert 7760 points

Hello Chi,

Following up on Clemens' comment, for Type 2 receivers the max VIT+ will be 150mV regardless of input voltage or input drop. Since the signal only drops to 180 mV, the output will stay high. See the graph below for reference.

Regards,

Josh

0 Chi Zhang2 over 1 year ago in reply to Joshua Salinas

TI__Intellectual 1960 points

Hi Josh and Clements.

thanks for the reply, could you help to provide the test data or the ATE data as reference?

customers want to take the real data as a reference. thanks.

Chi

0 Joshua Salinas over 1 year ago in reply to Chi Zhang2

TI__Expert 7760 points

Hello Chi,

The max VIT+ is guaranteed by our design team. The ATE data is kept internal and cannot be shared.

Regards,

Josh

0 Chi Zhang2 over 1 year ago in reply to Joshua Salinas

TI__Intellectual 1960 points

Hi Johshua,

thanks for the confirm, do we have any requirement for input rise time and fall time? I didn't find the input spec in the datasheet. thanks.

Chi

0 Joshua Salinas over 1 year ago in reply to Chi Zhang2

TI__Expert 7760 points

Hello Chi,

LVDS drivers don't usually have rise, fall time requirements. When looking at the datasheet's switching characteristics, some jitter measurements use a rise, fall time of 0.5 ns. However, your limiting factor will be the outputs rise time and fall time.

Regards,

Josh

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SN65MLVD206: VIT+ positive-going threshold when input signal drop