DS125MB203: Ethernet switch Controller IC Survey

Hi Jay,

We do not have a device like this in HSSC.  I have moved this thread to the Ethernet PHY group for comment, although I suspect that they do not have a comparable device either.

Thanks,
Drew

Hi Jay,

AM64 series processors might support these requirements, although they don't have integrated PHYs. I'll let someone from SITARA team help you.

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Regards,
Gokul.

Hello Jay,

AM62x, AM64x, and AM65x have Ethernet switch capability in the CPSW peripheral. The CPSW can be controlled by Linux A53 cores, or RTOS R5F cores (different processors have different cores). AM65x also has switch functionality in the PRU_ICSSG PRU Ethernet interfaces.

Sample documentation:

https://software-dl.ti.com/processor-sdk-linux/esd/AM62X/08_05_00_21/exports/docs/linux/Foundational_Components/Kernel/Kernel_Drivers/Network/CPSW3g.html#cpsw3g

https://software-dl.ti.com/processor-sdk-linux/esd/AM65X/08_02_00_02/exports/docs/linux/Foundational_Components/PRU-ICSS/Linux_Drivers/PRU_ICSSG_Ethernet_Switch.html

I am reassigning your thread to a member of the marketing team for any followup high-level questions.

Regards,

Nick

Note that any Linux processor can implement a software switch between two Ethernet ports (where Ethernet packets go from one port, all the way up to the Linux operating system, and then are sent out the other port). However, software switches take up processing bandwidth on the cores doing the switching.

The options I discussed above are all switches with hardware offload - i.e., the switching happens within the CPSW or PRU_ICSSG peripheral itself, so the switching is both faster, and does not take up any processing time on the Linux cores.

Regards,

Nick