This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

PCA9546A: Dual Master Device Application

Part Number: PCA9546A

Our application uses two FPGAs to simultaneously control this chip, with one main device and one backup device. If one device has an issue, the other can be backed up. However, in this application, there is a problem with the SCL of one channel, and turning one of them into a slave device cannot be restored; I would like to know if it is possible to support dual master device applications? If possible, could you help analyze the cause of the current problem?

  • The PCA9546A is an I²C slave device. It works with multiple masters if the masters implement arbitration correctly.

    I do not understand your problem. Can you show the schematic, and what the waveforms at specific points in the circuit are?

  • Hi Zhang,

    It sounds like one master device is communicating with the PCA9546A for some time before it is called to stop working. Then the second master device steps in to finish communication. However, it is claimed that the PCA9546A SCL pin is causing issues on the data, but this would only make sense that a downstream device would cause this issue since the PCA9546A doesn't drive a signal out of the SCL pin. SDA pin on PCA9546A is the only time it can drive a signal back to the master device by ACK/NACK. 

    I agree with Clemens, what problem are you attempting to solve here, the explanation you are giving is a bit confusing? A schematic and/or scope captures would help us understand your question more clearly. 

    Regards,

    Tyler