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TDES960: Link data rate

Part Number: TDES960
Other Parts Discussed in Thread: TDES954, , TSER953

I'm designing a surround view system based on TSER953 serializers in camera board and TDES960 and TDES954 deserializers in processor board for up to six cameras through two MIPI CSI-2 input ports. The cameras will be full HD 1920x1080 pixels at 30Hz frame rate (1080p30). This means roughly 1.5Gbps data rate, when MIPI CSI-2 overhead is not considered. In another thread it was discussed that 2Gbps link rate will be good for 1.6Gbps. For host CSI-2 port I would then use 4-lanes with 1.6Gbps per lane for TDES960 and 2-lanes for TDES954.

I have been reading through the TDES960 datasheet and I would need some clarification. I was planning to use synchronous mode, in which V3Link forward channel rate is a fixed value of 160 × REFCLK. In table 7-2 REFCLK oscillator specifications the frequency is min 23MHz, max 26MHz, which would mean V2Link forward channel rate of 3.68-4.16Gbps. Does this mean that 2Gbps link rate can't be used in synchronous mode? If TSER953 is used in non-synchronous mode, V3Link line rate is typically CLK_IN × 80, which would mean 2Gbps link rate with 25MHz oscillator for serializer.

However, in device status register (DEVICE_STS) bit 4 REFCLK_VALID is set when "REFCLK frequency between 12 MHz and 64 MHz". This would indicate that I could use for example 12.5MHz oscillator and get 2Gbps (160 x 12.5MHz) link rate in synchronous mode.

Which is the correct way to implement 4x 1.6Gbps V3Link cameras deserialized to 4-lane CSI-2 port with 1.6Gbps per lane?

  • Hello Ville,

    Can you please share the thread you are referring to for the 2 Gbps link rate?

    In general, the REFCLK frequency is 25 MHz but, other values can be used. In specific, the 25 MHz frequency enables CSI-2 data rates of 400-Mbps, 800-Mbps, 1.2-Gbps and 1.6-Gbps. The maximum data rate available using the 25-MHz REFCLK will be 1.6-Gbps per lane.1.6-Gbps per lane CSI-2 output can be achieved with synchronous mode.  

    Additionally, before providing recommendations on how to implement the application, can you specify the CSI-2 data type of the image data (bits per pixel)?

    Best,

    Zoe

  • The thread I'm referring to is visible on top of this thread as "Original question"
    https://e2e.ti.com/support/interface-group/interface/f/interface-forum/1220264/tdes960-cable-length

    The planned application is like this:


    If I want to use CSI-2 output with 1.6Gbps per lane, I have to use 4Gbps link speed for V3Link in synchronous mode? Datasheet says:

    "The forward channel line rate is independent of the CSI-2 rate in synchronous or non-synchronous with external clock mode."

    and then few sentences later:

    "In Synchronous mode based on REFCLK input frequency reference, the V3Link forward channel rate is a fixed value of 160 × REFCLK."

    How can we set the forward link rate to 2Gbps (Ffc~1GHz) as I haven't found a register controlling the link rate? Figure 8-3  "2G V3Link " suggests that this should be possible somehow. I'd like to use the lower link rate due to cable attenuation at higher frequencies.

    I don't yet know the camera CSI-2 data type as we don't have the camera and it's designed by another vendor. Looking at the sensor specifications it looks like camera CSI-2 data format can be set to RAW10 or RAW12.

  • Hello Ville, 

    Thank you for clarifying the original question. 

    From the video dimensions, frame rate, and specification of either RAW10 or RAW12, I calculated the data rate to be roughly 0.778 Gbps instead 0f 1.6 Gbps. Was a different bits per pixel used initially? 

    Additionally, please refer to the following information from the TSER953 which should help clear up confusion.

    As mentioned earlier, you were correct in that a 12.5MHz reference frequency would be needed for the 2G link (Half-rate as written in the data sheet). If using non-synchronous mode half-rate, a 25MHz oscillator is needed. 

    The CSI-2 output rate is not dependent on the oscillator which would enable the 1.6 Gbps data rate output. 

    Best, 

    Zoe

  • It looks like I have calculated the data rate based on RGB888 (24 bit/pixel), which is different from RAW bayer format that requires further processing in host.

    From TDES960 datasheet table 7-14 it looks like CSI_PLL_CTL register bits 1:0 control the PLL multiplier (x16, x32, x48, x64). If the REFCLK is 12.5MHz, the maximum CSI-2 data rate would then be 800Mbps. Is there some else way to have 1.6Gbps CSI-2 rate from TDES960 with 12.5MHz REFCLK? For 1080p30 RAW12 format 800Mbps could actually be enough if MIPI doesn't add much overhead. However, it would be good to have 1.6Gbps option if customer wishes to use 60fps frame rate or larger resolution cameras.

  • Hello Ville,

    To correct my previous message, the reference clock frequency listed in the table is what is seen by the serializer, not necessarily the oscillator being used. On the deserializer, a reference oscillator of 23-26 MHz is required as listed in Section 6.3. The reference clock seen by the serializer is half the oscillator frequency by setting the deserializer back channel frequency to 25 Mbps in register 0x58 BCC_CONFIG. 

    In total, the following three methods will enable the lower line rate: 

    • Synchronous mode: Set the back channel rate on the TDES960 reg 0x58[2:0]. A BC rate of 25Mbps will result in a FC rate of 2Gbps.
    • Non-synchronous external clock mode: Use a 25MHz reference clock on the TSER953 to get a FC rate of 2Gbps.
    • Non-synchronous internal clock mode: set the OSCCLK_SEL bit on the TSER953 reg 0x05[3] to 0 to get a FC rate of 2Gbps.

    Best,

    Zoe

  • Ok, this would make sense. However, TDES960 BCC_CONFIG does not list 25Mbps option, only 2.5Mbps, 10Mbps and 50Mbps.

    From chapter 7.4.1 it says that back channel rate is twice the reference clock:

    In Synchronous mode based on REFCLK input frequency reference, the FPD-Link III forward channel rate is a fixed value of 160 × REFCLK. FPD3_PCLK = 4 × REFCLK and back channel rate = 2 × REFCLK.

    From AC electrical characteristics it looks like 50Mbps is meant for synchronous mode, 10Mbps for non-synchronous mode and 2.5Mbps for DVP mode.

    Based on datasheet, it seems to be impossible to set the back channel rate to 25Mbps and therefore 2Gbps V3LInk speed in synchronous mode is not possible.

  • Hello Ville,

    Let me check with the team on this. I will get back to you by Monday 6/26 at the latest. Thank you for your patience. 

    Best,

    Zoe

  • Hello Ville,

    My apologies. This is correct the 25Mbps back channel rate is not available on the 960. The 960 configuration will need to use non-synchronous mode for the lower line rate. However, the synchronous half-rate mode is supported by the TDES954. 

    Please let me know if you have any additional questions. 

    Best,

    Zoe

  • Ok, thank you for clarification. Are there other disadvantages in non-synchronous mode than requiring local oscillators for serializers and lower back channel data rate? In our application the synchronization between different cameras is not critical so I guess non-synchronous mode is fine.

  • Hi Ville,

    As you had mentioned, asynchronous mode will require a local oscillator and lower back channel rate. 

    In our application the synchronization between different cameras is not critical so I guess non-synchronous mode is fine.

    Regarding this note I'm not sure if this is pertaining to potential use of synchronized forwarding from the TDES960. Synchronous mode and synchronized forwarding are independent features, and synchronized forwarding can be used without synchronous mode. Synchronized forwarding aggregates data from multiple SERs into one data stream, maintaining the same order in which packets are sent from each source. The requirement for synchronized forwarding is that the incoming video from each of the serializers must be aligned within 1 video line time and have the same video parameters. The use of synchronous versus non-synchronous mode refers to what the SerDes will use as the reference clock. 

    Asynchronous mode can be beneficial as it may lead to faster start up times. The deserializer in this case will not need to wait for the serializer to lock to the back channel, and then feed the recovered clock to the forward channel. 

    Best,

    Zoe