TL16C752C: The RXRDY Active Low transmission condition

Hi Conor,

Conor said:

Q1.
What is the RXRDY Active Low transmission condition?

The /RXRDY(A or B) is the output flag that goes low when the trigger level has been reached or a timeout interrupt occurs This flag goes high when the RX FIFO is empty, or there is an error in the RX FIFO flagged by the 7th bit in the LSR. 

The RXRDY functionality slightly changes between which DMA mode you are operating in. DMA mode 0, or DMA mode 1. 

DMA mode 0 = FIFO disable, FCR[0] = 0, DMA occurs in single character transfers.

DMA mode 1 = FIFO enabled, multicharacter (or block) DMA transfers which helps to relieve the processor for longer periods of time.

This information is found on page 28/29 of the datasheet. 

Conor said:

Q2.
RXA/RXB receive and hold the UART, and when specified by A[2:0], CSA/CSB, and IOR, the function to output the corresponding 8bit of the held UART to D[7:0]. I have. Is there any setting required to enable the above function? Also, how should I configure it?

I think the general configurations for successfully reading and writing data from and to the UART transceiver should be based upon the general write and read timings of figure 1 and figure 2 in the datasheet. 

Figure 1 for the general write condition.

Figure 2 for the general read condition.

The difference in the timing diagrams is mainly determined by the use of the /IOW and /IOR pins when either writing to the data bus, or reading from the data bus on bits D7-D0. I recommended programming the MCU to control the read and writes by the minimum / maximum timings found on page 11 of the datasheet in the section 7.6 timing requirements. 

Regards,

Tyler