This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

SN65HVD33: SN65HVD33DR Full Fail Safe

Part Number: SN65HVD33

Team,

I want to check with you if SN65HVD33 can support full failsafe function?

What is fullfail safe function: Without specific external circuit, when input is floating, the RX can keep logic high.

I can see that we support failsafe function, but not sure if we can support this by the device itself, or we have to realize this function by specific external circuit. Thanks!

BR, 

Qiang

  • And add one question, when the input is floating(without pull up/down) and no signal into input, what's the RO output status?

  • Hi Qiang,

    I want to check with you if SN65HVD33 can support full failsafe function?

    Yes this device includes it.

    What is fullfail safe function: Without specific external circuit, when input is floating, the RX can keep logic high.

    Full failsafe refers to how the VIT+ threshold is set up. When the VIT+ is set to a negative value, if the differential wires of the bus are shorted together (1), left open (2), or the bus is Idle (3) (where the drivers are high impedance) then the output R will maintain a logic HIGH. By offsetting the VIT+ threshold to negative, it ensures during each scenario that the differential voltage should stay above or be close to zero (assuming noise is minimal) so the VIT+ is always met.

    I can see that we support failsafe function, but not sure if we can support this by the device itself, or we have to realize this function by specific external circuit. Thanks!

    This can be verified by looking at the VIT+ parameter in the datasheet and seeing if it is a negative value. This is done internally on the design of the device. 

    If you wanted to make an external circuit for fail safe, you could do it this way: https://www.ti.com/lit/an/slyt324/slyt324.pdf?ts=1695843076113&ref_url=https%253A%252F%252Fwww.google.com%252F

    This approach would provide failsafe for idle and potential open scenarios as well as provide some additional biasing against noise. The downside would be additional components and more current draw.

    -Bobby