• State
  • Locked Locked
  • Replies 3 replies
  • Subscribers 33 subscribers
  • Views 120 views
  • Users 0 members are here
Support feedback
Options
Options
Similar topics

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

XIO2001: Device not downloading from EEPROM

Aaron Plude
Prodigy 10 points
Part Number: XIO2001

Tool/software:

I designed a circuit card based on the XIO2001 EVM but with a PMC form factor/connectors for the PCI side. I used the same EEPROM device as in the EVM, but I also connected a Lattice MachXO2 CPLD that programs the EEPROM with desired values before releasing GRST# and allowing the bridge to read the new data. However, when this initialization completes and GRST# is de-asserted, I don't see the bridge using the I2C to read the EEPROM. The CPLD outputs to the I2C bus are tristated after initialization to ensure that only the pull-up resistors remain for the bridge to detect the EEPROM. Power supplies also look fine. Is this process dependent on other conditions to trigger it? Is it necessary to also release PERST after GRST or can I just use GRST?

  • 0
    TI__Mastermind 18581 points

    Hi Aaron,

    Please ensure that data sheet Section 8.3.8 is being followed: Specifically, from Section 8.3.8.1:

    To enable the serial-bus interface, a pullup resistor must be implemented on the SCL signal. At the rising edge of PERST# or GRST#, whichever occurs later in time, the SCL terminal is checked for a pullup resistor. If one is detected, then bit 3 (SBDETECT) in the serial-bus control and status register (see Section 8.4.59) is set. 

    Best,
    David

  • 0 in reply to David Waier
    Prodigy 10 points

    Thanks for the quick reply! I believe I followed this paragraph. I have 10K pull-up resistors on SCL and SDA up to 3.3 V. I also have the CPLD tristating the SCL and SDA lines before releasing GRST# to ensure that the resistors are the only load on those traces. I'll try holding PERST# low until after GRST# is released to see if that makes a difference. Paragraph 8.3.8.1 mentions either GRST# or PERST#, but the description for SBDETECT in section 8.4.59 only mentions PERST#.

  • 0 in reply to Aaron Plude
    TI__Mastermind 18581 points

    Hi Aaron,

    Please let us know if there is any change when PERST# is also used in this sequence.

    Are you able to check the status of SBDETECT in the XIO2001?

    Best,
    David