DP83867IR: Diagnostic function

Hi Dino,

DP83867 does not have a specific register to indicate locked state.

There are some system-level checks we can use to see if locked state occurs:

1. If registers are inaccessible

2. If PHY configuration registers have reset to their default values (assuming straps or SoC sets non-default values)

Could you share more details about the surge test? I am curious to know the test setup, level of voltage injection, and any PHY configuration being performed.

Thank you,

Evan

Hello Evan, 

Thank you for your comment.but I don't understand your comment. 

Evan Mayhew said:

There are some system-level checks we can use to see if locked state occurs:

How can we system level check if locked state occurs? 

I think there is no fault indicator in DP83867 and there is no specific register to indicator of abnormal status. Is it right? 

If the customer can't access internal register, How about checking the clock output?
If there is no clock output, can we judge that DP83867 is a lock-up status?

Thank you. 

Hi Dino,

No clock output could be a symptom of locked up status if the PHY is powered and input clock is provided.

Nam, Dino said:

How can we system level check if locked state occurs? 

1) By attempting any register read. If the registers are inaccessible, PHY could be in locked up state. 

2) If the pins are being strapped or SoC is writing an init script to PHY registers, then reading the registers and seeing default value returned indicate the PHY has reset due to locked up state . For example, if RGMII TX/RX delay straps are used, then reading registers 0x32/0x86 and seeing default value returned will indicate reset has occurred during surge test.

Thank you,

Evan

Hello Evan, 

Thank you for your support. 

The main issue is not only the lock-up but also the PHY abnormal operation due to surge and ESD.

The customer will check register value periodically and they  would like to check if the PHY is abnormal by comparing the normal operation register value with the register value during the issue. 

Please refer to the attached customer register value including normal operation and abnormal operational value. 

DP83867 register value_240913.xlsx

The customer wants to be able to compare only a few register values to determine if there is a problem.

Please review attached register value and please let me know your opinion regarding which value can be used to determine whether the PHY is abnormal operation. 

Thank you. 

Hi Dino,

Thank you for sharing the register log.

Register 0x4[7:6] are good bits to reference for locked state.

In normal state, the current device straps set these bits to 0x4[7:6] = '01'.

These values should not change unless the device undergoes register reset, configuration by SoC, or reset due to surge/ESD event.

I also expect register 0x18 to not change unless there is a surge/ESD event causing PHY reset.

Thank you,

Evan

Hello Evan, 

Thank you for your comment. 

I think also Register 0x4[7:6] is good option. 

For 0x18 register, 

Evan Mayhew said:

I also expect register 0x18 to not change unless there is a surge/ESD event causing PHY reset.

Do you mean 0x18 register is LED Configuration Register 1 (LEDCR1)? is it right? 

If yes, this register value of LED Configuration Register 1 (LEDCR1) is 0x6150. it didn't change in normal state and issue state. 

Below is register 0x18 value in customer register log. we can't recognize issue state using this value. 

How about 0x12 register, MII Interrupt Control Register (MICR)? I think this value also should not change without reset status. 

The customer want to compare min 2~3 register value to cover all issue state. 

Please let me know your opinion. 

Thank you.