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DP83867IR: JTAG I/F pin handling

Part Number: DP83867IR

Tool/software:

Hi Team,

I am reviewing a customer's schematic.
Could you please advise on handling the JTAG pins?

1) Can the following pins be left floating when not in use?
JTAG_CLK
JTAG_TDO
JTAG_TMS
JTAG_TDI

2) The JTAG_TRSTN pin is pulled down to GND via 4.7KΩ. Is this correct?
What is the correct way to handle this pin when it is in use and when it is not in use?

<Device>
DP83867IRPAP

Best Regards,