Tool/software:
如果用这些芯片,将SPI信号转换为LVDS信号,进行板间通讯的话,是否可以不必将主模块的CLK信号再重新反馈回主模块?
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This depends on the propagation delays and the clock frequency. You need a feedback clock when the four propagation delays (logic-to-LVDS and LVDS-to-logic for MOSI plus logic-to-LVDS and LVDS-to-logic for MISO) are so large that the signal edges at the master's MISO pin arrive later than the current clock pulse.