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SN75LVPE3101: Questions on ideal termination settings

Part Number: SN75LVPE3101

Tool/software:

Hello,

Our customer is working on a PCIe Gen3 application and noticed that the PCIe Gen3 impedance requirement is 85 ohms +/- 5% as shown in TI app note below:

 https://www.ti.com/lit/an/slaae45/slaae45.pdf

 In my experience, this is ideal, but I have seen designs working fine at 100 ohms typical. Do you have any data on PCIe challenges/issues if the impedance was optimized for 100 ohms vs. 85? 

Thank you!

  • Hi Collin,

    Although PCI-SIG recommends 85-ohms differential impedance for trace routing in PCIe, the specification actually allows for differential impedance up to 120-ohms max without spec violation. We have seen many designs work without issue using 100-ohms differential impedance.

    Best,

    Lucas