ADS131M04EVM: Sample rate configuration

Hi Shraddha,

There is nothing else you need to change except the OSR. I have two questions:

1. What's the default data rate without writing the registers after the ADC on the EVM is powered up in your setup?
2. When you were using your MCU to interface with the ADS131M04 ADC on the EVM, did you remove the PHI controller card which is included in the kit? Can you clarify you connections to the EVM?

ADS131M04 is a simultaneously-sampling ADC, so the output data rate specified in the datasheet is the data rate for every channel (data rate per channel).

BR,

Dale

Hi Dale,

1. Default data rate is 4ksps (OSR is 1024) which is coming correct in my setup (250us delay between DRDY pulses). Once i change Clock register for OSR to 256, it changes to 8Ksps, I have read the register back after writing, Its reading whatever i set.

2. Yes I removed PHI controller card & external supply is given.

Regards,

Shraddga

Hi Shraddha,

Can you please clarify all your connections to the EVM including power supplies and digital signals?

BR,

Dale

HI Dale,

please find attched doc for coonections

/cfs-file/__key/communityserver-discussions-components-files/138/ADS131M04E.pdf

Regards,

Shraddha

Hi Shraddha,

Are you using the 8.192Mhz clock on the EVM or are your sending the clock from your MCU board to the EVM as shown in your block diagram? 

Can you change the OSR to other value and check it?

BR,

Dale

Hi Dale,

I am using 8.192Mhz on ADS EVM, but SCLK is supplied from MCU. Digital_CLK pin is open.

Regards,

Shraddha

Hi Shraddha,

Leaving Digital_CLK pin open is ok, your MCU does not need it.

I did not see any issue on your connection, and also it should work as you could read the Clock register data back which was correct as you said. 

Can you change the OSR not 256 to other value and check it?

Can you use 4.096MHz or 2.048MHz clock on the EVM and double check it?

Can you provide your timing (/CS, SCLK, DIN and DOUT) for reading the Clock register? 

BR,

Dale