DS92LV2421 to DS92LV0422 connection

Greetings -

The serial side is Channel Link 2  and the BIST mode is compatible between the '2421 & '0422.  Sorry to hear it is not working for you yet.

I would suggest to first establish a solid link perfomace by appling power, and clock, and enabling the part.  This should establish lock and the DES LOCK output should be stable.  If it is not stable, then there could be a problem to root cause which is also likely why BIST is not working correctly.  Common areas to check is SER input clock quality, high speed interconnect issues on SI, or excessive power supply noise.  To rule out the interconnect, you can try a shorted length or lower rate to add margin.

Once the link is stable and LOCK indication is stable, they the BIST mode steps should be stepped through and the PASS output checked on the DES.

John Goldie
DPS APPS / SVA / www.ti.com

John

In this test we are using the national Semiconductor LV24EVK01  Channel Link II SER evaluation board as the source.   We feed the signal from the eval board with the 2421 on it to 2422 on the target board and this BIST and lock works fine.  We do this through a twisted pair 3 foot cable but it will be 15 foot in production.      We then enable the pass through bufffer feature of the 2422 to feed the 0422 through the I2C interface.     The 2422's buffer output Rout+/- feed the 0422 inputs Rin+/- and the 0422 does not get either lock nor pass BIST.   The Rout+/- is a very short route on a circuit board with controlled impedence traces and a single series cap for each line. 

The 2422 on the target board not only passes BIST but outputs the data and clock as expected but the 0422 seems dead in the water.  I ahve tried this on more than a single board.   We can talk to all the parts through the I2C without issue but other than the I2C the 0422 does no seem to operate at all.  

There is no clock on our target board for these parts and only the clock on the LV24EVK01  development board.

Is there a problem with this approach?

Does the 2422 buffer add noise or cause a problem that would prevent the 0422 from locking?  

Thanks 

John

Greetings -

Thank you for the additional details, I think I understand you set up better now.  The 2422 and 0422 are on the same board and the LOCK and BIST to the 2422 is working fine.  When you connect the EQ Monitor outputs into a loop through connection to a 0422 it (0422) lock is not stable. 

I would recommend to first establish a solid lock with the 0422, something seems to be impacting it.  For this, I would have three suggestions:

a) run the link with all 0's (or 1s) for data, this will make the 2422 LVCMOS outputs static, and if LOCK is now obtained, we know that excessive noise from the 2422 outputs in impacting the 0422 PLL / CDR somehow on the same board.

b) if you have a high bandwidth - high impedance probe (eg TEK P6330) - compare the serial input signal to the 2422 and 0422 device.  Using the EQ monitor pins, is not retimed, just equalized, so you can get some additional SI impacts by making this connection.  This might indicate that either the 0422 is impacted by some supply noise, or the accumlicated jitter is high and over the limit when it arrives to the 0422.  The 0422 wont hold lock if it is seeing errors onthe embedded clock bits.

c) review the 0422 scematic and the typ apps connection in the datasheet.  This is a high speed part and the PLL / CDR is running at 28X the clock.  The supply noise filtering is recommended. If you like, please email us the 0422 schematic section to review on you board.  Another possibility is the high speed traces have some effect that is also impacting the 0422 and causing LOCK to be unstable. (my email is John.Goldie@ti.com)

In summary, I would suggest to first establish a solid lock to the 0422, then focus on the BIST mode.

John Goldie
DPS APPS / SVA