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DP83848I : PHY - Test with BIST mode

Other Parts Discussed in Thread: DP83848I

I have been doing a project with DP83848I and the Atmel UC3A MCU. Actually I have made a working sample by using the Atmel evaluation board EVK1105. However then when I use my own board, I could not communicate with the board by the PC. When I connect the board with the PC by a Cat5e cable, the PC show that a good 100Mb connection is detected, so I think the auto-negotiation is okay.

Then I realized that I can use the BIST feature of the DP83848I to test it. I want to ask to make a successful BIST, is that I just need to do the following step?

1. Set the LOOPBACK bit of BMCR register to 1 

2. Set the BIST_START bit of PHYCR registe to 1

3 Then read the BIST_STATUS bit of PHYCR, to check whether it is a 1(pass) or 0(fail)

For the loopback BIST test, can I assume that the MDI side will not affect this test result, so if I get a fail result, the problem is at the MII side?

Thank you very much

  • Gary,

    You have the gist of the test correct.  I would recommend forcing the mode for loopback operation. I would also recommend leaving the RJ-45 disconnected.  This just makes the test simpler and cleaner.  Do not drive the TX MII from the MCU during the test. 

    For 100M operation, the BMCR value would then be 0x6100.  Once you set the BIST_START bit in PHYCR, you should expect to see the BIST_STATUS bit set.  The BIST_STATUS bit should remain set as long as BIST is enabled. 

    Once you have confirmed that the BIST passes for internal loopback, there are two additional tests that you can run:

    1. BIST in external loopback
    2. Packet traffic from the MCU in internal loopback

    Running BIST in external loopback will help verify the analog portion of the Phy and the board connections between the Phy and the connector.  To allow the link to connect to itself, you will need to create an external loopback plug.  External loopback (also called "line loopback") can be used to loop the high speed lines of the link back to themselves.  The easiest way to achieve this is by making a custom cable and plugging it into the RJ45 connector.
      1. Cut a cable with about 1 foot of cable and the RJ45 connector
      2. Strip off about 3~4 inches of the outside plastic shield to expose the 4 pairs of twisted pair cable
      3. Bend back pairs 4/5 and 7/8 (these will not be used)
      4. Solder pair 1/2 to pair 3/6
            1. Solder wire 1 to wire 3
            2. Solder wire 2 to wire 6
      5. Now you have a loopback cable.
    Plug the cable into any operating 10/100 Ethernet port and link will be established (assuming Auto-Neg is enabled).  You can also force 100BASE-T or 10BASE-T full duplex to test those modes explicitly. 

    Running packet traffic from the MCU in internal loopback will allow you to evaluate the transmit and receive timing of the MII.  As before, I would recommend leaving the RJ-45 disconnected for this test.  BIST should also be disabled in the PHYCR. 

    Hopefully the results of these tests will help narrow down what is happening in your application.

    Patrick

  • Patrick

    Above you mention the External Loopback during BIST testing.  Not being familiar with the hardware the previous user referenced, which device pins on the DP83848 would I tie together to achieve this?  If the lines are kept very short, say 2" to 3" would it need to be twisted pair, or would simple wire work?

    Thanks

    Darwin

  • I moved this post to the Ethernet forum.  The Ethernet forum will be the correct place for these types of posts going forward.

    Regarding the question on whether or not it is necessary to use twisted pair for an external loopback, it is not necessary.  However, it is necessary to make the connection through the connector.  Otherwise, the full path will not be exercised.  In that case, it is often easier to trim a piece of Cat-5 cable as described above.

    Patrick