Hi,
I am facing the following issue in using dp83865. Please see below the problem description.
I am following the following sequence to initialize the phy dp83865
- Master Clock is given to the PHY, at pin number 86 from a 25MHz oscillator.
- Bring the PHY out of reset. The PHY is brought out of reset by driving 1 on the reset pin (#33).
- Issue the software reset to the PHY by writing to MODECTL register. Wait for approx. 2sec after the software reset.
- Read the registers to check if link established. Link is established.
- Configure the registers to set the speed, duplex mode. (manual/forced mode).
Following is the register settings of the PHY as I read back through MDIO.
BMCR = 0x4100
BMSR = 0x7949
ANAR = 0x5E1
ANLPAR = 0x45E1
KTCR = 0x300
KSTSR = 0
KCSR = 0x3000
STRAP_REG = 0xC041
LINK_AN = 0x402
AUX_CTL = 0xA000
Below is the description of the issues I face.
1. PHY fails to come out of software reset even after the prescribed time (20ms). This behavior is however intermittent.
2. When used in PHY loopback mode, the data received is consistently incorrect. I was not able to see any particular pattern in the incorrect data. I can see that the data sent out from the MAC to the PHY is correct.
3. When I try to transmit packets to a link partner, I can see no data received at the partner end. However, again, the MAC at the Transmitter is sending data correctly.
4. These issues are seen at all speeds, i.e, 10/100/1000.
5. I have verified the clocks, i.e, the Tx clock from the MAC and the Rx clock from the PHY.
6. At the other end, I am connecting to the dp83848 10/100 RMII phy. When connected to this PHY, I am testing for only 10/100 speeds.
Could you please help with these queries
- Could you clarify on the use of MDIX mode, whether to use it or not.
- Could you please shed some light to what might be possible reasons for the above issues?
- Is there a driver for dp83865 available?
Thanks,
Vineetha