Hi Everyone,
I understand that the LVDS outputs of DS90C187 will stay to Vos during sleep mode as attached. Now our customer is asking us the way to shut-off it (down to zero voltage) LVDS output because the receiver may request 0V input before power up. Do you have any idea to do it except power off VDD of DS90C187?
Best Regards,
Sonoki / Japan Disty
Hi Satoshi-san,
When the device is in sleep mode (PDB = low), the LVDS output is pulled to GND through 100-ohm resistors. Therefore, the LVDS outputs will be 0V. Therefore, I do not think this will be an issue for your receiver.
I did a quick measurement of the DS90C187 to verify this:
Measured OCA+ with input clock applied, PDB = H (note that I had some difficulty getting a stable probe, but the point here is that the output is a single-ended LVDS standard level):
Measured OCA+ with input clock applied, PDB = L (Output is pulled low to GND):
Thanks,
Michael
