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LMH0366 Increased Output Jitter

Don Schelle
Expert 4150 points
Other Parts Discussed in Thread: LMH0366

Hello,

A customer of mine is experiencing increased output jitter when using the multiple LMH0366 on a board.    The problem occurs when 3G video is driven through the part.    When switching between bypass and reclock modes repeatedly, output jitter starts to increase and eventually the reclocker fails to lock to the video.

Any thoughts on how to mitigate this?

Don

  • 0
    TI__Guru* 93670 points
    Hi Don,

    The LMH0366 has a high gain VCO which can be affected by noise from nearby reclockers or in-band switching noise from LDO powering the device . The following register settings allow the LMH0366 to attenuate noise being injected into the VCO:

    1. Register 0x19 bits 4:2 should be changed from 000 to 111. ; Increase VCO Gain to improve SNR
    2. Register 0x0A bit 6 should be changed from 0 to 1. ; Override Frequency and Phase Detector Charge Pump Current DACs
    3. Register 0x1C bit 6 should be changed from 0 to 1. ; Increase loop bandwidth

    While increasing VCO gain (VOD of internal VCO output) translates to better SNR, increasing the loop bandwidth of the PLL loop-filter does have some side-effects. Most notably, alignment jitter increases. Increasing the loop filter bandwidth from 3MHz (default setting) to 5MHz (new setting) yields an alignment jitter of around 0.09UI with a standard color bar pattern, which is still well within SMPTE spec of 0.3UI.

    Regards,,nasser
  • 0 in reply to Nasser Mohammadi
    TI__Expert 4150 points

    Thanks Nasser,

    This seems to have solved the problem.

    Don