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DS90CR215 24bits LVDS transmitter

Other Parts Discussed in Thread: DS90CR215, DS90CR287, DS90CR285

Hi,

This transmitter transmit 28bits parallel data to 4 LVDS pairs. In data sheet, it says 24 bits are for pixel R,G,B and 4 bits for control(HS,VS, DE, CTL). My question is this chip has to be used this way? If I send 28 bits data as whatever I want, would this be OK? In another word, the 4 bits can be treated as data as well?

What I am trying to do is:

1. Get pixel data from TF401 by FPGA

2. Cut a specified area of pixel data

3. send to other boards( more than 1 boards) via LVDS.

So I need:

1. transmit 8 bits x 3 =24 bits pixel data

2. transmit other control words( run with a self defined protocol)

I am now considering to use DS90CR215. Beside this, is there any better solution?

  • Hi Jeffery,

    Thanks for your post, and my apologies for the delay in response. Many members of our team were on holiday for the past two weeks and are just now catching up on E2E posts that were left during this time. We appreciate your patience during this time.

    Regarding your question, the DS90CR215 and other Channel Link I transmitters are simply serializers that follow the OpenLDI bit mapping from parallel LVCMOS to serial LVDS. It is not necessarily a device that is to be used exclusively for RGB data. In reality, you can theoretically send any type of control or pixel data you wish, so long as you keep track of where each parallel bit is serialized so that they are deserialized at the receiver end correctly. We are happy to help with this if you have questions about the mapping.

    Regarding the choice of device, the DS90CR215 has 4 LVDS pairs, but only 3 of them contains data. One of the LVDS pairs must always be used to transmit the LVDS clock. Therefore, with the DS90CR215, you actually only have the ability to send 21 serialized bits on the 3 LVDS pairs (7 bits per pair). To send the 28 bits of data you desire per clock cycle, I recommend looking at the DS90CR285 or DS90CR287, where you have access to 5 LVDS pairs (4 data pairs and 1 clock pair).

    Thanks,

    Michael