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SN65MLVD082: Is it possible to change both DE and D at the same time when DE is enable?

toshi-e2e
Genius 4780 points
Part Number: SN65MLVD082

Hi all,

About M-LVDS devices, like SN65MLVD082/204A,
is it possible to change both DE and D signals at the same time when DE is enable?

I think that DE should be enable after confirming the signal of D.

The background of this question is due to the phenomenon that the output oscillates when data / enable of another company's C-MOS IC is changed at the same time.
The reason was that due to timing control error of each signal, temporary through current occurred near Vth of the enable signal and counter electromotive force was output as oscillation by L component inside the IC.

Best regards,
Toshi

  • 0
    TI__Intellectual 1810 points
    Hi Toshi,

    Yes, it's possible to change both DE and D at the same time. However, the output will only reflect the D (input) value after tpZH or tpZL time delay. In general, the output in relation to DE and D inputs is determined by a specific truth table. For example, for SN65MLVD082, please check out the truth table for DRIVERS at the bottom of page 13 of the SN65MLVD082 datasheet.

    On that truth table, you can see that when D input is off (OPEN), the differential output is kept at a known "differential low" level. Making it that way prevents the phenomenon you've described where the noise on the D input may result in a false output. This particular device implements a "failsafe" feature to prevent that scenario.

    Best regards,

    Hassan.