LMH0341: LMH0341 LVDS Data output

hello 

We are using LMH0341  and SD-SDI Video Protocol, we Connect LMH0341  LVDS output to FPGA Xilinx Spartan-6 XC6LSX9-2tqg144.

in VHDL Program ; we use 27 MHz Clock and when event rising edge and falling edge we get 5-bit data from LVDS.

but when we merge 5-bit data and make 10-bit Data , we cant see    x3FF x000 x000  (Data Steam).

Will Data Scramble in this Chip ?

Will Data Encode in this Chip ?

please help me.

thank you