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TLK10031: XAUI to XFI (10GBase-R) translation/converstion as per section 8.1 in the datasheet (-see Figure 8-1 page 123).

ajayt
Genius 9555 points
Part Number: TLK10031
Other Parts Discussed in Thread: TLK10034

I wonder if you could provide any help with an issue we're having using the TLK10031 to perform XAUI to XFI (10GBase-R) translation/converstion as per section 8.1 in the datasheet  (-see Figure 8-1 page 123).

 

We have had some success in that we have the TLK10031 performing XAUI to XFI translation from a XAUI port on a MVL (Marvell) 6390X (10G) switch to a MVL 3310 PHY. However XFI to XAUI is not working. To get things to work in the TX direction :

 

ARM  -->  RGMII --> MVL 6390X --> XAUI -->(LS) TLK10031(HS) -> XFI -> MVL 3310 10G PHY -> SFP+ --> SM FIbre --> SFP+ --> 10G NIC --> Linux PC

 

we've configured the TLK10031 to operate in 10GBASE-R mode (ANEG disabled, Link training disabled).  To do  this we have configured the following register settings in the TLK10031 using Clause 45 MDIO :

 

    metnet60_cl45++ w c 0x1e 0x0000 0x8610 # 1. Reset Device

    metnet60_cl45++ w c 0x07 0x0000 0x2000 # 3. Disable ANEG

    metnet60_cl45++ w c 0x01 0x0096 0x0000 # 4. Disable Link Training

    metnet60_cl45++ w c 0x1e 0x8020 0x03ff   # 5. KR training settings

    metnet60_cl45++ w c 0x1e 0x000e 0x0008 # 7. Issue Data path reset

 

These setting are based on the following TI forum post :

 

https://e2e.ti.com/support/interface/f/138/p/718212/2677661?tisearch=e2e-sitesearch&keymatch=TLK10031#2677661

 

Resetting ANEG and disabling link training is detailed in the datasheet, but I cannot find an explanation of what register 0x8020 does, and why we need to write 0x3ff to it!

 

Also, to investigate why RX is not working (XFI -> XAUI), we've used a 10G NIC card in a Linux PC to generate ARP requests (arping) , and configured the TLK10031 in Deep Remote Loopback like so:

 

 

 <--(LS) TLK10031 (HS)<--- XFI <-- MVL 3310 10G PHY <--- SFP+ <--- SM FIbre <--- SFP+ <--- 10G NIC <--- Linux PC.

|

|

| Deep Remote Loopback - see Figure 5-6 in TLK10034 datasheet.

|

|

 -->(LS) TLK10031 (HS)---> XFI --> MVL 3310 10G PHY ---> SFP+ ---> SM FIbre ---> SFP+ ---> 10G NIC ---> Linux PC.

 

 

This passes fine - the Linux PC sees a duplicate of the ARP. However, if

I extend the test to perform a loopback on the Switch port like so :

 

 

<--MVL 6390X XAUI <--(LS) TLK10031 (HS)<--- XFI <-- MVL 3310 10G PHY

<--- SFP+ <--- SM FIbre <--- SFP+ <--- 10G NIC <--- Linux PC.

|

|

| Marvell 10G Switch XAUI loopback

|

|

--> MVL 6390X XAUI-->(LS) TLK10031 (HS)---> XFI --> MVL 3310 10G PHY

---> SFP+ ---> SM FIbre ---> SFP+ ---> 10G NIC ---> Linux PC.

 

The ARP gets lost - indicating that it's not getting looped back.

 

Furthermore, when I look at the disagnostics on the XAUI port of the

6390X switch, I see that all lanes are synchronised and that the Link is

up. Furthermore, the PCS appears to be sending IDLE symbols, but not

receiving them.

 

Could it be that with the above register writes we are only disabling

ANEG and/OR link training on the RX diff pairs, but not the TX pairs.

 

Regards

  • 0
    TI__Guru 64326 points
    Ajayt,

    First to answer your question writing 0x3ff to 0x1E addr 0x8020 allows the link settings that would normally be configured through KR training to be configured manually instead. Next, setting applied to the channel should affect both RX and TX. Is it possible that the signal is lost through the optical connection on the far end? Have you tired eliminating this connection if possible? Also please correct me if the below diagram is not correct, I want to make sure I am understanding your test setup correctly.

    <--MVL 6390X XAUI <--(LS) TLK10031 (HS)<--- XFI <-- MVL 3310 10G PHY <--- SFP+ <--- SM FIbre <--- SFP+ <--- 10G NIC <--- Linux PC.

    |

    |

    | Marvell 10G Switch XAUI loopback

    |

    |

    --> MVL 6390X XAUI-->(LS) TLK10031 (HS)---> XFI --> MVL 3310 10G PHY ---> 10G NIC ---> Linux PC.
  • 0 in reply to Malik Barton57
    TI__Guru 64326 points
    Ajayt,

    After learning more about your system it seems that there may be some SI issues in this link: MVL 6390X XAUI <--(LS) TLK10031. Would it be possible to check the eye of this link and could you provide the settings for TLK10031 with respect to the low speed side? These registers would be LS_SERDES_CONTROL_1, LS_SERDES_CONTROL_2, LS_SERDES_CONTROL_3.
  • 0 in reply to Malik Barton57
    TI__Guru 64326 points
    Ajayt,

    Is there any more support needed for this issue? If so please reply with any relevant details so that I can further assist you. For now I will be marking this thread as "TI Thinks Resolved". If you have resolved your issue, please post the solution to the original problem/post for others with similar issues.