• State TI Thinks Resolved
  • Locked Locked
  • Replies 1 reply
  • Answers 1 answer
  • Subscribers 32 subscribers
  • Views 215 views
  • Users 0 members are here
Support feedback
Options
Options
Similar topics

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

SN65LVDS4: SN65LVDS4 input pulse width

Martin Gold
Prodigy 345 points
Part Number: SN65LVDS4

Hi Team,

my customer has to convert a very short LVDS signal (aro. 0.5 ns) to a LVCMOS signal.

The SN65LVDS4 could be a interesting part for this, but customer miss the minimum input pulse width in the datasheet.

Could you give me this information?

Is there a part that fits better for this task?

Thanks and Best Regards

Martin

  • 0
    TI__Genius 10250 points
    Hello Martin,

    SN65LVDS4 (and any LVDS receiver in general) doesn't really have a min pulse width per se, as it just translates edge transitions on LVDS side to edge transitions on LVCMOS side. So, the pulse width is only limited by the rise/fall time on the LVCMOS output.

    SN65LVDS is a good option since its rise/fall times are relatively short but depends on the voltage supply (please see Switching Characteristics table in the datasheet). Assuming VDD is 3.3V, the rise/fall time is 550 ps max (with 10 pF load), which means a 500 ps pulse on the input would be pushing the limit (in the worst case temp, supply, and process).

    It can work, however, especially if the load is less capacitive (see Fig 5 & 6 in datasheet for the effect of capacitive load on rise/fall time -typical values). Also, it would help if the temperature is limited to something less than 85 ᵒC, if the supply voltage is closer to the upper end of the range (3.3V to 3.6V), and the LVDS signal at the input of SN65LVDS4 is clean (as close as possible to 1.2V common mode, 350mV swing with fast rise/fall times). Also, it depends on what the device receiving the output of LVDS4 can tolerate, because the LVCMOS signal may not reach all the way to the specified VOH/VOL values.

    Regards,
    Yaser