Because of the holidays, TI E2E™ design support forum responses will be delayed from Dec. 25 through Jan. 2. Thank you for your patience.

  • State TI Thinks Resolved
  • Locked Locked
  • Replies 1 reply
  • Answers 1 answer
  • Subscribers 32 subscribers
  • Views 254 views
  • Users 0 members are here
Support feedback
Options
Options
Similar topics

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

DS32ELX0421: clock input

Kevin Xiong
Expert 2340 points
Part Number: DS32ELX0421

Hi,

I'm using DS32ELX0421. I have some questions. Could you please help me answer them?

1. Can the clock input of DS32ELX0421 be FPGA's IO?

2. Why is there only clock? But there is no any data on the others ports?

3. Could you please give me an example of configuration register?

Thanks.

Kevin Xiong

  • 0
    TI__Mastermind 35130 points

    Hi Kevin,

    1. The clock needs to be LVDS. Please see the datasheet for the requirements.

    2. I don't understand your question here. There is 1 LVDS clock and 5 LVDS data lanes.

    3. Please read the datasheet. There's an example device configuration on page 14.

    Regards,

    I.K.