I have a customer requesting hysteresis info for the D, DE and REbar pins.
Can someone provide me with this?
Thanks.
Regards,
Darren
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I have a customer requesting hysteresis info for the D, DE and REbar pins.
Can someone provide me with this?
Thanks.
Regards,
Darren
Darren,
I will look into this. I'll update you the data I find.
Regards,
Hao
Darren,
There is no hysteresis circuitry in the input logic pins. Please let me know if you have more questions.
Regards,
Hao
Hi Hao,
Could you help clarify a little?
6.3 Recommended Operating Conditions from the datasheet says for D, DE and xRE that their recommended operating range is V_IH from 2V↑, and V_IL from 0.8V↓.
But what is the threshold value, and is there any deglitch time or something to keep noise from flipping the device output on/off (noise on DE) or sending the wrong signal (noise on D)?
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If there really is no hysterisis, then I suppose the MCU needs to implement it's own "deglitch time" to make sure the enables and signal voltages are at their desired value...correct?
Regards,
Darren
Darren,
You're correct. The triggering point of the logic pin would be the same no matter the edge is rising or falling. Please see this simulated data as an example. The setup is Vcc=5V, REB=L, DE=H and 60Ohm resistor bus load. You can see if there is some noise in D's ramping up, the device output will be effected.
Please let me know if you have any further questions.
Regards,
Hao