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SN65LBC173A-EP: Propagation delay clarification

Part Number: SN65LBC173A-EP

Hi Team,

I would like to get your input regarding the inquiry of the customer below:

In the customer's design, he is driving IC's output low. The question is if the differential inputs' rising delay is a bit large(~15ns), will it experience high impedance to high level output propagation delay? or instead just low level to high level propagation delay?

Please let me know if you have any questions.

Thanks,

Jonathan

  • Jonathan,

    Is the rising delay single-ended or differential? What's the input signal before the bus driving low, high impedance or high?

    Regards,

    Hao

  • Hello Hao,

    Here's the answer I got from the customer:

    The rising delay is differential. The input signal is high and with a ramp, it decreases to low but the output falling is not a concern to them.
    When the bus starts to rise with a ramp, will the propagation delay be affected by the low slope of the ramp?

    Looking forward to your response.

    Regards,

    Jonathan

  • Jonathan,

    If you follow the definition of the datasheet (Figure 7 on the datasheet), the slow ramp input will impact the propagation delay (the device always responses to the same input voltage level). Nevertheless it's never been disabled. The impact should be on the low to high delay.

    Regards,

    Hao