Other Parts Discussed in Thread: DS15BA101
Hi Team,
My customer connects the DS15EA101 with the signal from the CMOS image sensor via AC coupling.
They equalize the DS15EA101 and input it to the FPGA with AC coupling.
Some noise is generated at the output when the image sensor is idle (no differential signal input).
The noise disappears and returns to normal after a while after the image sensor starts to input signals.
Is this phenomenon because the input node is in the Hi-z state in the idle state, and the small noise at the input is affecting the output?
The customer has confirmed that the noise is still present at the output when the input is dropped to GND for testing.
In the following post, it says that the DS15BA101 has an undetermined output state even when there is no input signal, and that it oscillates and changes state randomly.
Does the DS15EA101 have the same specification of noise superimposed on the output when there is no input signal?
I understood that the countermeasure is to put a termination resistor in front of the capacitor and IC as shown in this post.
Best Regards,
Kenji
