Hello,
We are using the TUSB7320 in a custom Xilinx Zynq based system. We have already successfully tested the TUSB7320 EVM board with our kernel on a Xilinx ZC706, so there is something wrong with our current hardware configuration of this USB chip on our custom board. We are unable to detect any USB devices on our custom board. XHCI seems to be probing successfully, though there is never any interrupt generated for this device (testing with 'cat /proc/interrupts').
Notes about the problem/system:
- The TUSB7320 endpoint is recognized by the PCIe root complex at startup
- XHCI thinks it has successfully probed the TUSB7320, and 2 USB hubs appear in the system.
- XHCI driver is setup for MSI-x, but I have forced the driver to try MSI, and legacy interrupts (behavior doesn't change)
- We require power-on inversion, so I typically set that bit with 'setpci -d 104c:8241 e0.L=400000' and then soft reset the unit. Once this bit is set, 5V is applied to the USB ports.
- The TUSB7320's pcieport config space shows a master abort in the primary status (register 0x6)
- The root controller's pcieport config space does not show a master abort in the primary status (register 0x6), but does show it in the secondary status register (0x1e)
- We have 4 other PCIe endpoints on this custom board (xilinx kintexs, with i2c cores, and MSI interrupt scheme) which are all working fine.
Our power up sequence is captured in the attached image (note that 1.1V comes on at the same time as 3.3V):
Is there any issue with GRST and PERST being de-asserted at the same time?