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Connect the two DP83849ID PHYs back to back by their RMII interface

Other Parts Discussed in Thread: DP83849ID, DP83849IF

Hi,

I am implementing a TX to FX media converter using the DP83849IF with its internal mode, but I would like to also connect the RMII interfaces together as a provision if we decide to use the DP83849ID (because it's less expensive).

As I understood, I need to:

- Connect the TX[1:0] and RX[1:0] together

- Connect the TX_EN and RX_DV together

- Configure one PHY in master RMII and the other in slave RMII

My questions are: What clock do I connect together (clk2mac, TX_CLK, RX_CLK, X1, etc)? Do I need to connect something else?

Thank you,

  • Frederic,

    We have an application note on connecting two single PHYs back to back in RMII mode (www.ti.com/.../snla076). It is not exactly what you are looking for, but provides some details on the necessary pin connections.

    For the DP83849, there is only one clock input, X1, and it provides the clock to both ports so there are no concerns for the clocking. There is no master / slave relationship between the ports. Both will be RMII slaves. The clk2mac, TX_CLK, and RX_CLK signals are unused in RMII mode.

    The key connections will be connecting the TX[1:0] / RX[1:0] signals together and the TX_EN / RX_DV signals together. I would recommend connecting the RMII interfaces either externally or internally, but not both at the same time.

    Patrick
  • Great, thank you for your reply!

    I had read the SNLA076 app note (and the SNLA086 too), but was confused with the clocks. I will put 0R on the external RMII signals. 
     
    What is the reason to to connect both at the same time? Wouldn't the MUX in the DP83849IF disconnect the unused one?

    Thank you,

  • Hi Frederic,

    Here is another app note that might explain further.

    www.ti.com/.../snla086b.pdf

    Regards,
    Ross