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DM814x with DP83848K PHY in RMII Mode

Other Parts Discussed in Thread: DP83848K

Hello, I have a design that's using a DM8147 processor and connecting a DP83848K PHY for 10/100M Ethernet.  We're trying to bring up the board and I'm stuck debugging this and could use some ideas on where to look.  Here are the vitals:

  • Using WEC7 and attempting to issue a DHCP request from eBoot to see if we can boot over EMAC0.
  • Using RMII to EMAC0 on the DM8147 and having the DM8147 supply the 50 MHz refclk to the PHY.
  • PFBIN1 and 2 are at +1.8V.
  • RBIAS pin measures +1.2V.
  • Supplies and termination bias are at +3.3V.
  • Clock to the PHY looks good at 50 MHz with no ringing or reflections using an active probe.
  • REFCLK and the TX data line to the PHY use 22 ohm series resistors and are matched length in the layout.
  • The PHY undergoes a reset pulse and the strapping resistors are in place to put it into RMII mode (2.2K pull-up on pin 32).
  • I leave the PHY address bits alone to default to "00001".
  • One thing I did not do was pull down the other two TXD inputs to the PHY by design but I did make a mod to do this.
  • When the board comes up and takes the PHY out of reset, I can see the link light on both the router and my board Ethernet jack light up.
  • eBoot is able to communicate with the PHY over the MDIO bus (488 kHz for some reason) and indicate that the PHY is in 100M, full-duplex mode.
  • When we change the boot mode to use EMAC0, we get nothing but timeouts when DHCP requests are sent out.
  • I've probed the TX_EN and TXD[0] and TXD[1] traces and they do indeed toggle when the requests are sent out.
  • I have my PC also plugged into the same LAN side as my board to monitor Ethernet traffic using Wireshark looking specifically for DHCP packets.  I can see my PC issue a request and it gets a response from the router issuing it an IP address.  However, absolutely nothing from my board when DHCP requests are sent (being monitored in eBoot console).

I've attempted to provide the schematic below of the PHY and jack.  Some questions I have:

  1. I'm not sure if this is a hardware or software issue at this point.  The software team has indicated they have properly configured the EMAC for RMII and it appears data is coming out the TX data pins as well as the TX_EN on each DHCP request attempt.
  2. The magjack I'm using does NOT have the Bob Smith termination - is this required?
  3. What else can I look at?

Thanks in advance!

 

  • Hi Alan,

    I have reviewed the schematic and also looked over the steps you have taken to debug this. It does not appear to be a hardware issue, but there are some things you can still do to verify the PHYs setup.

    Have you done a register dump to see what state each register is in? I am curious if it is booting into RMII mode.

    Since you do see 100M Link I would not suspect is being due to not having Bob Smith termination.

    Kind regards,
    Ross
  • Thanks for such a quick response, Ross. Yes, I'm working with my software engineer to do just that and get a dump of the PHY registers. I figured if the negotiation stage worked to establish a link, noise was likely not an issue but I wanted to get a second opinion to rule that out. Will post what I find as soon as I can.

    Also, just as another data point, the SPD indicator on the jack also lights up which I believe coincides with the reported 100M speed by the PHY.

    Alan
  • Ross, below is a register dump of the PHY after our software has configured it:

    PID:00400002 TID:02910006 ti_register_dump for channel 0.
    PID:00400002 TID:02910006 register 0:0x3100
    PID:00400002 TID:02910006 register 1:0x7849
    PID:00400002 TID:02910006 register 2:0x2000
    PID:00400002 TID:02910006 register 3:0x5c90
    PID:00400002 TID:02910006 register 4:0x1e1
    PID:00400002 TID:02910006 register 5:0x0
    PID:00400002 TID:02910006 register 6:0x4
    PID:00400002 TID:02910006 register 7:0x2001
    PID:00400002 TID:02910006 register 0x10:0x0
    PID:00400002 TID:02910006 register 0x11:0x0
    PID:00400002 TID:02910006 register 0x12:0x0
    PID:00400002 TID:02910006 register 0x14:0x0
    PID:00400002 TID:02910006 register 0x15:0x0
    PID:00400002 TID:02910006 register 0x16:0x100
    PID:00400002 TID:02910006 register 0x17:0x21
    PID:00400002 TID:02910006 register 0x18:0x0
    PID:00400002 TID:02910006 register 0x19:0x8021
    PID:00400002 TID:02910006 register 0x1A:0x904
    PID:00400002 TID:02910006 register 0x1B:0x0
    PID:00400002 TID:02910006 register 0x1D:0x6011
  • Hi Alan,

    Do you have the cable connected and see LED LINK ON? The registers would suggest that this PHY is not done with Auto-Negotiation yet. The LINK status bit is not set and Auto-Negotiation bit is not set. The Link Partner's abilities are also not loaded yet.

    Kind regards,
    Ross
  • Good question. I got these from our software guy and was not present to observe. I'll have to check with him.
  • Here is an update when the link lights are on during eBoot:

    ti_phy_register_dump for phy_addr:1 channel 0.
    register 0:0x3100
    register 1:0x786d
    register 2:0x2000
    register 3:0x5c90
    register 4:0x1e1
    register 5:0x45e1
    register 6:0x7
    register 7:0x2801
    register 0x10:0x15
    register 0x11:0x0
    register 0x12:0x2c00
    register 0x14:0x0
    register 0x15:0x0
    register 0x16:0x100
    register 0x17:0x21
    register 0x18:0x0
    register 0x19:0x8021
    register 0x1A:0x904
    register 0x1B:0x0
    register 0x1D:0x6011
  • Hi Alan,

    Thanks for the quick update. The registers are showing the the PHY is operating properly. Link is GOOD and the Auto-Negotiation complete. The PHY is configured for 100Mbps full-duplex and RMII.

    Next step is to confirm that the MAC you are connecting to is operating at the same RMII version the PHY is. In register 17 you can choose between the 2 different versions. Can you confirm that the PHY and MAC are operating with the same version? Also, in RMII mode the PHY uses a FIFO since it is a 2bit not 4bit digital interface. How large are the packets you are sending? The FIFO depth can be increased if the packets are large.

    Kind regards,
    Ross
  • Ross, the software did, in fact, try change the RMII revisions but that didnt have an effect.  And the packets are not large at all - its just a DHCP request.  The software team is scouring things in their code looking for any timing issues when initializing the PHY and EMAC among other things.  We'll let you know what we find out.

  • Hi Alan,

    Another idea is to use a loopback cable and send packets out and see if you can receive them by snooping with wireshark. This will let you know if the data that you do send out is making it though the entire PHY in both directions. What you will need to do is route the TD+ pin to RD+ and TD- to RD- (i.e. connect RJ45 pins 1 &3 together and pins 2&6 together).

    Kind regards,
    Ross
  • Yep, speaking of loop backs, I'm having the software guys see if they can setup a loopback on the RMII side.  I think we're having more problems there than on the line side.