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TCA9544A: I2C MUX channel selection

Part Number: TCA9544A
Other Parts Discussed in Thread: TCA9554A

hi TI 

we are working on a TCA9544A Mux to configure to multiple(3)  I2C slaves which is having same address

We developed our own board with this I2C MUX , ch0, ch1, ch2 are used for 3 slaves  

How would I select the particular channel to read / write data from slaves

as per the  data sheet

 command register is INT3, INT2, INT1, INT0, X, B2, B1, B0   , lower byte selects the channel to read/ write data operation 

1.  As per data sheet 1 0 0 which ch0 active so i can communicate with ch0 ? 

 start , E8(MUX_ addrs)+R, 0x4 ,  stop ,  then 0x29 (Slave_addrs)   does this I2c commands communicate to the channel-0 ?

 

  • Hi Vinod,

    Thanks for your question.  I hope I can help answer them for you. 

    The short answer is yes, I think you are mostly correct and your sequence will configure the TCA9544A mux to connect channel 0 to the bus. 

    The only error I see is with the "E8(MUX_addrs)+R" portion of your statement.  If the address is 0xE8 (1110 1000).  The Fixed address is 1110, A2 = 1, A1 = 0, A0 = 0, and the R/W bit = 0.  To indicate a write operation the R/W bit = 0.  To indicate a read operation the R/W bit = 1.  You have set the bit to 0 for a write, but in the description called it a "R" for read.

    To configure TCA9544A device to switch channels, you need to do a Write operation to the control register.  Your value of E8 is actually correct.  Once the TCA9554A device acknowledges your addressing write, you then write to the control register with 0x04 (0000 0100).  This will select channel 0.  Once the TCA9544A device acknowledges the control register write, the master must issue a stop condition on the bus before proceeding with any communication to the slave device. 

    If there are interrupts that need to be read from the control register, the master needs to address the TCA544A with a "R/W = 1" to indicate a read operation of the control register is about to take place.  The TCA9544A will issue an acknowledge of the addressing and return the control register contents.  Once the Read operation is complete, the Master receiver must signal an end of the data to the transmitter by not generating an acknowledge (NACK) after the last byte has been clocked out of the slave.  This is done by the master receiver holding the SDA line high.  In this event, the transmitter must release the data line to enable the master to generate a stop condition. 

    There is only one byte of data to read since there is only one control register.  This is discussed in the programming section of the datasheet and shown in Figure 10 on page 12. 

    But in summary, the values in your sequence should cause the bus to switch to channel 0 and allow you to communicate with that device.

    Regards,

    Jonathan

  • I got it ,  

    The actual thing i want to do is, MUX is inter phased with the 3 Color sensors to ch0, ch1,ch2 which is having same address 

    I want get the color sensor data from ch0 then ch1, then ch2

    so as you said

    1.start,  0xE8 (Mux_adrs + W) , 0x04 , 0x29 ( Color IC addrs), stop    similarly on other channels 0x05 (ch1), 0x06 (ch2)