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DS90UB948-Q1EVM: How to ensure the 948 is locked to the 949?

Dan Ringger
Intellectual 1790 points
Part Number: DS90UB948-Q1EVM
Other Parts Discussed in Thread: ALP

We have a DS90UB948-EVM and DS90UB949-EVM. We are able to see the pattern generator when driving the display on OLDI interface, so we know that is correct.

 

- how do I ensure the 948 is locked to the 949? I get no indication with both units powered, connected by SMA cables and 949 in demo mode, pattern generator on and set to default (800 x 480) resolution.

 

- how do I input local EDID for the 949 board to read into local SRAM?

  • 0
    TI__Genius 10475 points
    Hello,
    You can look at the LOCK signal to ensure 949 is linked to 948. You can also set the device in BIST mode and monitor PASS to validate the link between 948 and 949. Please refer to the device datasheets for additional details.
  • 0 in reply to Palaniappan Manickam
    TI__Intellectual 1790 points

    I have spent quite a bit of time at TI University studying the 948 and 949 and their inner workings. I certainly understand Lock and Pass. When working with the actual EVMs though, it’s a bit confusing… there really is no big secret on the setup  as given in the respective EVM guides. But following all the steps and playing with the features isn’t getting me closer to functionality. We are able to use the 948 (receiver) pattern generator and get solid image on the display and Lock indicator, as expected. But the viewing the status of the 948 on ALP indicates it is connected to the serializer, even with no connection between the two boards. And when the 949 serializer EVM IS connected to the 948 deserializer EVM, the ALP status screen on both sides indicate they are not linked. If we select the right medium (coax or STQ) on both EVMs, how can they fail to link? Never mind if we got the timing set correctly between the two ends, the clock should still indicate “Lock”. It does not.

     

    As I said, it is most confusing.

  • 0 in reply to Dan Ringger
    TI__Expert 8165 points
    Hello Den-

    The following thread provides an example script for loading EDID: e2e.ti.com/.../

    For writing to EDID and changing what is stored in there by default (default setting for EDID is listed at top of page 19 in the 949 datasheet), you can either use DDC I2C interface or I2C interface with APB indirect register access reads and writes.

    To use DDC, you must specify default address 0xA0 for I2C address. This address can be changed in FPD-Link register 0x51 on 949 device. From here, you can access over I2C what is stored on EDID through simple I2C writes and reads. Specify the register that you want to write/read and then the value that you want to write. For example:

    board.ReadI2C(0xA0, 0x00)
    board.WriteI2C(0xA0, 0x00, 0xFF)

    To use APB interface (which should be easier due to auto-increment and the recommended method), please use the instructions below for accessing EDID SRAM. For example, if you were to perform a write:

    Set APB_ENABLE bit to a 1.
    Set APB_AUTO_INC to a 1. (This is helpful if you would like to perform writes in a series).
    Set APB_ADR0 and APB_ADR1 to 0x00 in order to write to address 0x0000.
    Set APB_DATA (0,1,2,3) to chosen value (i.e. APB_DATA0 = 0xFF)

    The data is written. Now, APB_ADR0 = 0x01 after auto increment. APB_ADR1 = 0x00 and won’t increment until APB_ADR0 = 0xFF. For example, in I2C code using default 949 FPD-Link I2C address of 0x18:

    board.WriteI2C(0x18, 0x48, 0x0D)
    board.WriteI2C(0x18, 0x49, 0x00)
    board.WriteI2C(0x18, 0x4A, 0x00)
    board.WriteI2C(0x18, 0x4B, 0xFF) // This is writing APB_DATA0 = 0xFF just as an example.

    In order to READ, the process is the same except that you must set APB_READ bit to a 1 before every read. This would look like:

    board.WriteI2C(0x18, 0x49, 0x00) // Set addresses FIRST.
    board.WriteI2C(0x18, 0x4A, 0x00)
    board.WriteI2C(0x18, 0x48, 0x0F) // Perform the read.
    Board.ReadI2C(0x18, 0x4B) // APB_DATA0 (and DATA1, DATA2 and DATA3 registers) register has been populated with EDID SRAM data according to address specified. It can now be read over I2C.

    Regards,
    Davor
  • 0 in reply to Davor Glisic
    TI__Intellectual 1790 points

    Thanks Davor

    We are making decent progress on the development of our product based on the results from the 948 and 949 evms. It would be nice to go through some TI University course work on the use of test points to more quickly gather info on evm operational status. There are quite a few test points called out, but no explanation of the functionality. If you could point me in a useful direction, I would appreciate it!

  • 0 in reply to Dan Ringger
    TI__Genius 10475 points
    Dan,
    We have some video modules on the TI FPD-Link learning center page that you might find useful. One of the modules goes into details about the link diagnostic features.
    training.ti.com/fpd-link-learning-center