Hello,
Auto negotiation not completing on Zynq
Auto-negotiation of DP83822I connected to Zynq does not complete. I would like some suggestions for solving this.
reset
-The reset pin asserts for 100us several hundreds ms after the start of clock supply.
Bootstrap pin
-Check the voltage during reset pin assertion. As designed.
register
-R / W is possible.
-Auto-Negotiation is valid. (addr 0x0000 bit 12)
-Auto-Negotiation has not been completed. (addr 0x0001 bit 5)
-Link not established. (addr 0x0001 bit 2)
-PHY address is 0x01. (addr 0x0019 bit 0: 4)
* Attach the contents of the register dump.
Auto-negotiation of DP83822I connected to Zynq does not complete. I would like some suggestions for solving this.
reset
-The reset pin asserts for 100us several hundreds ms after the start of clock supply.
Bootstrap pin
-Check the voltage during reset pin assertion. As designed.
register
-R / W is possible.
-Auto-Negotiation is valid. (addr 0x0000 bit 12)
-Auto-Negotiation has not been completed. (addr 0x0001 bit 5)
-Link not established. (addr 0x0001 bit 2)
-PHY address is 0x01. (addr 0x0019 bit 0: 4)
* Attach the contents of the register dump.
addr val
---------
0000 1000
0001 7849
0002 2000
0003 a240
0004 01e1
0005 0000
0006 0004
0007 2001
0008 0000
0009 0000
000a 0100
000b 1000
000c 0000
000d 0000
000e 0000
000f 0000
0010 0002
0011 0108
0012 0000
0013 0000
0014 0000
0015 0000
0016 0100
0017 02c1
0018 0400
0019 8021
001a 0000
001b 007d
001c 05ee
001d 0000
001e 0102
001f 0000
0020 1000
0021 7849
0022 2000
0023 a240
0024 01e1
0025 0000
0026 0004
0027 2001
0028 0000
0029 0000
002a 0100
002b 1000
002c 0000
002d 0000
002e 0000
002f 0000
0030 0002
0031 0108
0032 0000
0033 0000
0034 0000
0035 0000
0036 0100
0037 02c1
0038 0400
0039 8021
003a 0000
003b 007d
003c 05ee
003d 0000
003e 0102
003f 0000
0040 1000
0041 7849
0042 2000
