TCA6408A: Open-drain outputs pulled to various voltages & where to pull up reset

Nathan Conrad2 said:

Part Number: TCA6408A

I'm wondering if it's "legal" to use multiple different pull-up voltages on the output of the TCA6408A I/O expander. This seems to be the same as the question TCA6408A-Q1: Pullups vs VDDP voltages, but that question wasn't answered and seems to have been abandoned.

In particular, please see the attached diagram. My MCU is operating at 3.4V, and I need outputs at both 3.5 and 1.8 V logic levels. My board-space is very tight, so I'm hoping to be able to use a single I/O expander IC, instead of multiple packages. I'm using the lower voltage (1.8V) for VCCP so that there is less shoot-through current on the port's input buffer. 

Thanks for the background information. I'm looking at the internal schematic (FET level) for this device and it looks like if you do something like this (make 3.4V while Vccp is 1.8V) you could potentially make the PFET (Hi side output driver on the p-port) conduct in the opposite direction causing your 1.8V to get pulled up higher than intended. I would need to test to verify this...... I didn't see any diode to prevent this from happening in our device.

1) Is my diagram correct (ignoring decoupling caps), and will let me minimize power consumption?

It doesn't look like you have included the other P-Ports so I can't say for sure.

2) Is there a power consumption difference in outputting LOW on unused ports, versus leaving them as an input and connecting them to GND?

That should still result in the same thing. I assume you would get different results if you drove the pin HIGH instead as that should generate less leakage current through the input stage. When I see consumption current readings are lower if the input stages are HIGH versus LOW. See below:

3) I don't plan to need to reset the IC from the micro, we should be able to power cycle the board if needed (though this is difficult, as it'll be welded into is enclosure), so I want to tie reset directly to a power supply rail. Since the 1.8 V rail is established second, I assume reset should be tied to it? (The datasheet figure 21 shows it using VCCP as a threshold, but figure 38 shows it's a constant threshold voltage? Table 10 has a typo saying "fising" instead of "rising"). This is similar to RESET – VCCP connection?

Table 6 tells us the reset is referenced to VCCI and in the internal schematic it looks like it also uses the VCCI rail. I would tie it to VCCI, the device will reset itself when Vccp powers up (internal logic resets the state machine when both supplies come up and reset is HIGH).

4) Does connecting reset directly to a rail instead of through a pull-up resistor increase the current consumption?

I don't think so. The reset pin feeds into an ESD cell which is not active and has a series resistance (to prevent damage in case people connect it directly to a power rail) and into gates of a FET. The gates are high capacitive but the series resistance from the ESD cell should limit the instantaneous current and prevent damage.

 

(And to make searching easier, I'll include the keywords TCA6416A and TCA6424A since the answers should be the same.)

I removed the '0' you inserted to fix the searches in the future.

Thanks for the background information. I'm looking at the internal schematic (FET level) for this device and it looks like if you do something like this (make 3.4V while Vccp is 1.8V) you could potentially make the PFET (Hi side output driver on the p-port) conduct in the opposite direction causing your 1.8V to get pulled up higher than intended. I would need to test to verify this...... I didn't see any diode to prevent this from happening in our device.

Thanks for your detailed response. I had figured it might work based on the "recommended operating V_IH as being 0.7*Vccp to 5.5V", but it's a bit iffy. after reading your response relating to the pFET and looking at the simplified schematic in the datasheet, I'm going to look for alternatives. On the other hand, the difference of my supplies is ~1.6 V, if the threshold voltage of the pFET is more than  about 2.0 V, the leakage wouldn't be a problem.. Figure 17 shows the output being within 100 mV of VCC also suggesting there is no diode preventing backflow.

I just found a note in the PCF8574A datasheet  describing related issues when driving LEDs, but it's a quasi-bidirectional output which would act differently than the tri-state buffer of the TCA6408A.

It doesn't look like you have included the other P-Ports so I can't say for sure.

The IO expander is driving the shutdown pins of 6 ICs. The board is battery operated, and will have these other chips enabled low with very low duty-cycle. Three are 1.8 V logic while the other three are 3.3/3.4 V. Two of the GPIO pins would be unused.

I'm trying to control their shutdown via I2C, and have a power consumption of <5 uA when everything is shutdown (at room temperature). It looks like running the GPIO expander VCCI=VCCP=3.4V (with outputs pulled up to handle reset) and using a SN74AUP3G34 buffer to translate down the logic level may be the best solution. Or now that I've noticed the PCF8574A, I'll look at it, too.