[ DS90UB914A-Q1 ] General Status Register

Kenichiro

[ DS90UB914A-Q1 ] General Status Register

(Subject corrected)

Hi,

Do these status registers reflect the status dynamically? It means these bits are asserted only when parity error, no signal detected, un-locked condition. (not latch) Correct?

Thanks,
Ken

over 8 years ago

0 Sean Thornton1 over 8 years ago

TI__Expert 5210 points

Hello Ken,

Bit 1 and 0 status registers should change dynamically and output the current status of the system in real time. I believe that bit 2 should not change until the system is either PDB reset (hence resetting the register) or after the PLL unlocks then relocks, resetting this register check for parity errors.

-Sean

0 Kenichiro over 8 years ago in reply to Sean Thornton1

Mastermind 9165 points

Thanks for your help, Sean!

Ken

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[ DS90UB914A-Q1 ] General Status Register

[ DS90UB914A-Q1 ] General Status Register