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DS90UB964-Q1: MODE pin and IDx pin

Kenichiro
Mastermind 9165 points
Part Number: DS90UB964-Q1

[ DS90UB964-Q1 ] MODE pin and IDx pin

Hi,

Can you please elaborate how MODE and IDx pin define the mode upon power-up?

As my understanding, these pins (MODE and IDx) have ADC internally. Once device is powered-up (i.e, supply voltage goes into the valid range),
these adc start to read and conver the voltage, applied to each pin to digital word, then device change the mode based on that digital read out.

Or it's  really appreciated if you can share the internal equivalent circuit drawing.


Also, the circuit schematics of EVM suggests to put 0.1uF cap for these pins.
Are these for having  more robustness to interference?

What we shuld not do here is to haveing too large cap, because time constant getting larger and takes longer time to stable the voltage.


Thanks,
Ken


Similar Post, posted almost same time.

DS90UB921-Q1: IDX, MODE pin 0.1uf capacitor

http://e2e.ti.com/support/interface/high_speed_interface/f/138/t/649083


  • 0
    TI__Genius 12705 points
    Yes, you are correct in your assessment except for one point. The MODE and IDX are not sampled when supply voltage is in valid range, but after the supply voltage is in valid range and then PDB is brought high. Yes the 0.1uF capacitor is to help with supply and GND noise and should not be too large. There is typically some offset timing between the supply and PDB which will help for the cap voltage to settle. Depending on how clean is your system power/gnd rails these may not be required.