Dear Support,
Could you provide us the relation between the maximum value of the capacitor on SDA2 and SDCL2 lines and the data rate on them? (the same for SDA1 and SDCL1).
I think about the capacitor between lines and related GND (GND2 or GND1).
Have you got any document about acceptable filtering (capacitor, inductance, resistor, etc) we can add on those lines related to the data rate?
Best regards.
Pierre Bruot