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Original question:

ISOW7841EVM: ISOW7841EVM

ISOW7841EVM: Adding ferrite beads, common mode chock and stitching capacitors.

Tomer Bruchiel
Intellectual 640 points
Part Number: ISOW7841EVM
Other Parts Discussed in Thread: ISOW7841, ISOW7741

Hello,

I am planing a device that will use the ISOW7841.

It need to pass CISPR 32 class B certification.

I went through the application notes for both the 7841 and the 7741 devices.

In the 7841 device the recommendation is to use common mode chock while in the 7741 EVM board there are ferrite beads.

What is the best recommendation?

Is it better to use both beads and CMM in series? If so, which one should be connected to the decoupling capacitors?

Also I so that it is recommended to use stitching capacitor, my space is very limited, can I add a Y2 capacitor between GND1 and GND2?

Thanks,

Tomer

  • 0
    TI__Guru 54535 points

    Hi Tomer,

    Thank you for reaching out.

    ISOW7841 is our first-generation device that integrates isolated DC/DC converter. Based on the design, PCB size, cabling and test setup, you may require common-mode chokes to meet CISPR 32 Class B in worst-case situations.

    ISOW7741 is the second-generation device that significantly improve radiated emissions and doesn't require common-mode chokes and can achieve the best results with just the ferrite beads which are much smaller in size and lower in cost. Hence, we recommend that you use ISOW7741 for your application and meet CISPR 32 Class B with minimal external components.

    Stitching capacitor does help lower radiations further but it might demand for a large PCB space to achieve a reasonable capacitance but we believe it is not required for ISOW7741 to meet CISPR 32 Class B for most applications. A Y2 capacitor is assumed to do the same job as stitching capacitor but unfortunately it suffers from high leakage / lead inductance that could reduce the effectiveness of the capacitor and not improve emissions much. Hence, we do not recommend Y2 caps for improving radiated emissions.

    Please follow the guidelines provided in the below application note and you should not have any problems meeting CISPR 32 Class B requirement. Thanks.

    How to Meet CISPR 32 Radiated Emissions Limits With ISOW7741


    Regards,
    Koteshwar Rao

  • 0 in reply to Koteshwar Rao
    Intellectual 640 points

    Thank you Koteshwar,

    The reason I will use ISOW7841 and not the ISOW7741 is just because of stocking conditions.

    I cannot get any ISOW7741  while I can find some ISOW7841.

    Back to my original question, I can integrate common mode chocks. Do I still need the ferrite as well or CMM is eanogh?

    Best,

    Tomer

  • 0 in reply to Tomer Bruchiel
    TI__Guru 54535 points

    Hi Tomer,

    Thanks for sharing additional information, I understand your reasoning behind choosing ISOW7841.

    Common-mode chokes (CMC) offer higher attenuation / impedance to noise at desired frequencies than the ferrite beads (FB), hence, we recommend using CMCs with ISOW7841. Just the CMCs should be sufficient for most applications and FBs are not needed. In very rare case if an application has a very large PCB or multiple long wires connected to the test setup, then they could cause higher radiations than usual in which case just the CMC might not be enough. Based on the frequency of emissions observed, one might need to use stitching capacitor. But to start with, I would recommend to consider CMC, build the boards and test.

    You can refer to the below E2E post for details on where to connect CMC and a few example part numbers. Let me know if you have any questions, thanks.

    https://e2e.ti.com/support/isolation-group/isolation/f/isolation-forum/806938/isow7841evm-isow7841evm


    Regards,
    Koteshwar Rao

  • 0 in reply to Koteshwar Rao
    Intellectual 640 points

    Thank you.

    This is very helpful.

    I saw the post you mentioned regarding the CMC.

    One thing I do not understand is the orientation of the CMC on the PCB - it looks fine in the schematics but rotated by 90 degrease in the PCB or is that just this specific CMC footprint?

  • 0 in reply to Tomer Bruchiel
    TI__Guru 54535 points

    Hi Tomer,

    I understand.
    The footprint was created to accommodate both CMC and FBs and the FBs with >300mA were large in size. This is why you primarily see two large footprints on each side of device that accommodates FBs and these are large enough to also accommodate the listed CMCs instead. You can choose the footprint according to the CMCs that you would like to evaluate. Thanks.


    Regards,
    Koteshwar Rao

  • 0 in reply to Koteshwar Rao
    Intellectual 640 points

    Hi Koteshwar,

    Another question please - regarding the ground planes.

    When using CMM, it creates a local ground path.

    When creating stitched capacitors or generally when placing the ground planes around the ISOW7841 (like in the EVM board)m should I use he local ground or the grounds of the entire circuit and just connect the CMM to these grounds at a single point?

    Thank,

    Tomer

  • 0 in reply to Tomer Bruchiel
    Intellectual 640 points

    Also,

    Are the two ground pins on each side should be connected to the local ground or just the ones that are adjacent to VCC and VISO?

    Thanks,

    Tomer

  • 0 in reply to Tomer Bruchiel
    TI__Guru 54535 points

    Hi Tomer,

    Thanks for seeking further clarification to best implement the solutions.

    Tomer Bruchiel said:
    When creating stitched capacitors or generally when placing the ground planes around the ISOW7841 (like in the EVM board)m should I use he local ground or the grounds of the entire circuit and just connect the CMM to these grounds at a single point?

    Since the stitching capacitors needs to be connected to device GND pins directly to suppress any radiations, the stitching cap has to be implemented on the local ground that is formed on device pins. This ground shouldn't overlap to any other system grounds which otherwise can nullify the effect of CMCs due to noise coupling.

    Tomer Bruchiel said:
    Are the two ground pins on each side should be connected to the local ground or just the ones that are adjacent to VCC and VISO?

    The two GND1 pins are internally shorted and hence, also need to be connected to the same local GND plane to provide best connection to all internal circuit. This is true for GND2 as well.

    Let me know if you have any other questions, thanks.


    Regards,
    Koteshwar Rao

  • 0 in reply to Koteshwar Rao
    Intellectual 640 points

    Thank you Koteshwar,

    This is very helpful.

    It seems that due to the tight space that I have stitching caps are not an option (I can only go up to around 6-7 pF).

    But If I understand correctly since I am using CMM, all the surrounding ground planes showld be the local grounds and the connection to the general ground planes should be only with the CMM pins correct?

    Also, I am not using IN2/OUT2 and IN3/OUT3 -should I leave them floating (both sides) or tie them to ground? If the recommendation is to connect them to ground, should I connect them both sides or just the IN side?

    Thanks,

    Tomer

  • 0 in reply to Tomer Bruchiel
    TI__Guru 54535 points

    Hi Tomer,

    Please see my inputs below.

    Tomer Bruchiel said:
    It seems that due to the tight space that I have stitching caps are not an option (I can only go up to around 6-7 pF).

    You are right, since the horizontal space limited, the only way to achieve higher capacitance values is by increasing vertical dimension or by reducing the layer thickness. I understand the application might put some restriction on these parameters and you might be limited to a small stitching cap.

    Tomer Bruchiel said:
    But If I understand correctly since I am using CMM, all the surrounding ground planes showld be the local grounds and the connection to the general ground planes should be only with the CMM pins correct?

    Your understanding is correct. As shown in the schematic, the device ground and system ground should only connect through the CMC. Any single direct connection could create a short across the CMC and make it ineffective.

    Tomer Bruchiel said:
    Also, I am not using IN2/OUT2 and IN3/OUT3 -should I leave them floating (both sides) or tie them to ground? If the recommendation is to connect them to ground, should I connect them both sides or just the IN side?

    Please find below our general recommendation for unused input pins. But for your application, it is fine if you leave them floating. Thanks.

    https://e2e.ti.com/support/isolation-group/isolation/f/isolation-forum/732667/faq-can-unused-channel-pins-on-a-digital-isolator-be-left-floating


    Regards,
    Koteshwar Rao