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SN6507-Q1: Soft-start functionality explanation

Gergely D.
Prodigy 10 points
Part Number: SN6507-Q1

Tool/software:

Hi,

When looking at the SN6507-Q1 datasheet it is not entirely clear how the soft-start functionality works.

The datasheet says:

"SN6507-Q1 device supports soft-start feature. Upon power up or when EN/UVLO pin transitions from Low to High, the gate drive of the output powerFET is gradually increased over a period of time from 0 V to full driving strength."

And it also says:

"During soft-start, the over-current protection is disabled."

And:

"The sort-start time to ramp to the peak switch current is calculated by the capacitor and resistor on SS/ILIM pin with the following formula."

Does the second quote really mean, that there is no current limitation during soft-start? Or does it just mean, that the short-circuit protection feature described in the second half of the OCP chapter is disabled?

I would have assumed, that since the soft-start capacitor is connected parallel with the current limit setting resistor, that during soft-start the current limit is ramped up somehow, but I am confused by the description in the datasheet. I could also understand the first quote in a way that it means, that the nominal powerFET switch resistance is reached only after the soft-start period and before this the powerFET resistance is ramped, for example by ramping the gate voltage. Or maybe there are multiple powerFETs in parallel and they are not all switched on during soft-start?

The third quote would imply some kind of current limit ramping.

Can you please provide a short description of the expected behavior with enough information for a basic simulation of the soft-start itself?

Thank you for your help!

Best regards,

Gergely

  • 0
    TI__Genius 10705 points

    Hello,

    Thank you for your question. Please give us additional time to review and respond to your question.

    Regards,
    Aaditya Vittal

  • 0
    TI__Guru 54205 points

    Hi Gergely,

    Welcome to TI E2E forum!!

    Sorry that the information provided in the datasheet wasn't clear enough for you to understand soft-start operation. Please see my inputs below, thanks.

    1. Yes, the second quote means that the current limit function is disabled during soft-start. As you already stated, SS/ILIM pin is a dual function pin, when soft-start is active the current limit function is not recognized.
    2. Soft-start is achieved by controlling the gate drive to the power MOSFETs. By gate drive, we mean the voltage to the gate of MOSFET is increased gradually.
    3. The third quote is simply referring to SS/ILIM pin and that this pin is used to set soft-start time and current limit, independently.


    Regards,
    Koteshwar Rao

  • 0 in reply to Koteshwar Rao
    Prodigy 10 points

    Dear Koteshwar,

    thank you for the answers!

    The datasheet mentions a hard overcurrent protection limit at 5A. Is that also disabled during soft-start?

    With "the voltage to the gate of the MOSFET is increased gradually" do you mean, that the gates receive a PWM signal, but with a top voltage, that increases gradually, much slower than the PWM frequency? The other way I could understand, that during soft start within each PWM period you drive with the full gate voltage but with a much larger resistance, resulting in a gradual increase of the gate voltage, but this time within a PWM period?

    There is this quote in the datasheet:

    " To ensure a smooth transition between soft-start and the steady state, it's recommended to have a CSS value between 50 nF and 5 µF with an output capacitor, COUT, of less than 10 times the value of CSS."

    Why is this needed? Shouldn't the allowed output capacitor size scale with the transformer ratio? Lower output capacitor with higher output voltage transformers and larger output capacitors with lower output voltage transformers?

    What is expected to happen with larger output capacitors?

    Again thank you and best regards,

    Gergely

  • +1 in reply to Gergely D.
    TI__Guru 54205 points

    Hi Gergely,

    Thank you for following up with additional questions.

    Gergely D. said:
    The datasheet mentions a hard overcurrent protection limit at 5A. Is that also disabled during soft-start?

    Yes, this is disabled as well, as the RILIM resistor at SS/ILIM pin cannot be read until soft-start is completed.

    Gergely D. said:
    With "the voltage to the gate of the MOSFET is increased gradually" do you mean, that the gates receive a PWM signal, but with a top voltage, that increases gradually, much slower than the PWM frequency?

    No, there is no PWM control during soft-start. The duty cycle stays 48% during soft-start and the absolute voltage to gate of the MOSFET is gradually increased to slowly increase the conductivity of MOSFET thereby gradually increasing the drain current. This keeps the peak inrush current to minimum which is the primary purpose of soft-start, i.e., to minimize the peak inrush current.

    Gergely D. said:
    Why is this needed? Shouldn't the allowed output capacitor size scale with the transformer ratio? Lower output capacitor with higher output voltage transformers and larger output capacitors with lower output voltage transformers?

    As stated in my last paragraph, the primary purpose of soft-start is to minimize the peak inrush current during start-up. If COUT > (10*CSS), then the output voltage doesn't reach its final value during soft-start. Once soft-start is completed, the input current can suddenly increase to charge the output capacitor faster. This can lead to high inrush current, albeit after the soft-start. This voids the purpose of soft-start and makes this feature ineffective.

    Therefore, to see the benefit of soft-start, COUT < (10*CSS).

    Regarding the relationship between output capacitor and turns-ratio / output voltage, yes it helps to scale the output capacitor inversely proportional to the turns-ratio / output voltage when soft-start is not available as a feature. This can keep the power-up time to a similar time. But since soft-start already slows the power-up time sufficiently, sizing the output capacitor according to turns-ratio / output voltage isn't critical unless the turns-ratio / output voltage is really large. But it is fine to follow this rule for any output voltage provided COUT < (10*CSS) is maintained.

    Let me know if you have any further questions, thanks.


    Regards,
    Koteshwar Rao

  • 0 in reply to Koteshwar Rao
    Prodigy 10 points

    Thank you for the quick reply!