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ISO1042: Powerdown in sleep mode

Part Number: ISO1042
Other Parts Discussed in Thread: SN74LVC2G17

Tool/software:

To save the power, we are thinking to shutdown supply to ISO1042 during sleep mode of uC.

There are 2 scenarios which can be implemented to save power.

1. Microcontroller (3V3_uC) in sleep mode, Vcc1(3V3) ON,  Vcc2(5V_ISO) OFF

2. Microcontroller (3V3_uC) in sleep mode, Vcc1(3V3) OFF,  Vcc2(5V_ISO) OFF

Do you think it can have impact on the IC in any of the above 2 scenarios, i mainly looked on the below table

Here when Vcc1 is 0V during off state, the limit is just 0+0.5V..i.e 0.5V??

Can i implement the above 2 scenarios without any issues?

  • The TXD/RXD pins have clamping diodes to VCC1.

    A buffer with Ioff like the SN74LVC2G17 will prevent problems.

  • Hello Deepak, 

    VCC1 and VCC2 can be powered on independently without any damage to the device. 

    Here when Vcc1 is 0V during off state, the limit is just 0+0.5V..i.e 0.5V??

    You are correct, the limit is 0.5V when VCC1 is off. This means that he MCU should not provide a signal when the ISO1042 is unpowered. The pin connected to TXD can be tri-stated during power off to prevent issues (SN74LVC2G17 is a tristate buffer). 

    Pull TXD high to VCC1 while powering down if using a tristate output to drive TXD. This will help make sure the MCU does not drive a dominant state while the input is floating, and the system is shutting down.

    Best,
    Andrew