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ISOW1412: Low EMI layout question

Youhei Miyaoka
Expert 4185 points
Part Number: ISOW1412
Other Parts Discussed in Thread: ISOW1432, ISO1412,

Tool/software:

Hi team,

My customer have several questions for low EMI.Can you answer each question please?

1. How wide does they need to secure for KOZ?

2. In the case of a multi-layer board, should all layer's KOZ not wire all signal lines and GND solid (except RS485 signal lines)? 

3. For low EMI design, should customer tie 1pin-20pin with coupling capacitor or 10pin-11pin with coupling capacitor or both is recommended?

4. ISOW1432 and ISO1412 have same EMI result under the same conditions?

Regards,

Youhei MIYAOKA

  • +1
    TI__Expert 8190 points

    Hi Youhei,

    Please find my inputs below:

    Youhei Miyaoka said:
    1. How wide does they need to secure for KOZ?

    A minimum of 2mm distance between any metal and KOZ is recommended for the effectiveness of KOZ.

    Youhei Miyaoka said:
    2. In the case of a multi-layer board, should all layer's KOZ not wire all signal lines and GND solid (except RS485 signal lines)?

    Yes, KOZ should be maintained through all the layers.

    Youhei Miyaoka said:
    3. For low EMI design, should customer tie 1pin-20pin with coupling capacitor or 10pin-11pin with coupling capacitor or both is recommended?

    I believe that you are asking about the stitching capacitor across the ground planes.
    Since the primary source of emissions is the Isolated DC-DC converter, whose grounds are GND1(Pin10) and GND2(Pin11), placing the stitching capacitor near to Pin10 & 11 is most effective. However, adding one additional capacitor near to Pin1 & 20 will further assist in reducing overall EMI performance.

    Youhei Miyaoka said:
    4. ISOW1432 and ISO1412 have same EMI result under the same conditions?

    Yes, since the internal power converter which is the primary source of emissions is exactly same in both the devices, the emissions are will be same for ISOW1412 and ISOW1432.

    Regards
    Varun

  • 0 in reply to Varun Kumar
    TI__Expert 4185 points

    Hi Varun,

    Thank you for answer. I will wait for the customer feedback.

    Regards,

    Youhei

  • 0 in reply to Youhei Miyaoka
    TI__Expert 4185 points

    Hi Varun,

    Varun Kumar said:
    I believe that you are asking about the stitching capacitor across the ground planes.
    Since the primary source of emissions is the Isolated DC-DC converter, whose grounds are GND1(Pin10) and GND2(Pin11), placing the stitching capacitor near to Pin10 & 11 is most effective. However, adding one additional capacitor near to Pin1 & 20 will further assist in reducing overall EMI performance.

    Can you share image by figure? If they place a capacitor near pins 1 and 20, does it mean to extend the pattern to GND on pins 10 and 11, that is, routing across all the pin patterns? 

    They also have additional questions;

    Is the 7-pin OUT and 14-pin IN general purpose I/O ports?
    If do not use of them, should they leave those pin open?

    Regards,

    Youhei

  • 0 in reply to Youhei Miyaoka
    TI__Expert 8190 points

    Hi Youhei,

    Youhei Miyaoka said:
    Can you share image by figure? If they place a capacitor near pins 1 and 20, does it mean to extend the pattern to GND on pins 10 and 11, that is, routing across all the pin patterns? 

    We don't have a layout with the above requirement, but it is a really simple layout exercise even on a 2-Layer board to extend the ground planes to top of the device - again i repeat that this is not at all required but just good to have if the luxury of space on PCB is available.

    Having it near to Pin10-11 is the most effective way

    Youhei Miyaoka said:
    Is the 7-pin OUT and 14-pin IN general purpose I/O ports?
    If do not use of them, should they leave those pin open?

    Yes - the pins can be left Not Connected if not used.

    Regards
    Varun

  • 0 in reply to Varun Kumar
    TI__Expert 4185 points

    Hi Varun,

    Varun Kumar said:
    We don't have a layout with the above requirement, but it is a really simple layout exercise even on a 2-Layer board to extend the ground planes to top of the device - again i repeat that this is not at all required but just good to have if the luxury of space on PCB is available.

    My customer feels difficult to understand and make layout, can you share by figure please? Just a memo is okay.

    Regards,

    Youhei

  • 0 in reply to Youhei Miyaoka
    TI__Expert 8190 points

    Hi Youhei,

    I just made a rough outline using the layout diagram in datasheet. 

    Red - Top Layer Ground

    Blue - Bottom layer Ground.

    Using the stitching vias, ground layers can be interconnected through layers and brought to Top layer again, if needed. 

    This is a simple PCB layout exercise but please note that I've already emphasized in my previous responses above on the fact that placing capacitor on top side is absolutely not needed and it should be our responsibility to talk customer out of any unnecessary design complexity - placing a capacitor near pin10-11 is already more than enough.

    Regards
    Varun