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AM62A7: The DDR partitions isolation in AM62A7 A53 Linux for function safety

Part Number: AM62A7

ASIL-B and QM processes in A53 Linux share the same kernel, memory, CPU caches, and interrupts. This means that faults or heavy resource use in QM software can affect ASIL-B functions. So, How to  implement the following mechanisms to ensure FFI between ASIL B and QM SW processes on A53 core?

(1)Define ASIL B and QM DDR memory regions by configuring bootloader or the Linux device tree;
(2)For hardware-based memory isolation the MMU(for DDR) or MPU(for SRAM) can be used to assign the access rights to ASIL B and QM SW processes of A53 core;
(3)Interrupt Isolation,Inter-core: Configure interrupt controller so that QM-related interrupts are not routed to ASIL B cores. Intra-core : MMU can ensure QM ISR cannot access the ASIL B memory region.

Could TI provide some other feasible mechanisms to meet the software processes isolation requirement?

Thanks.

  • Hi,

    I’ve assigned your query to the concerned expert. Please note that responses may be delayed due to the Christmas and New Year holidays. Please feel free to ping this thread if you don't receive a response latest by Jan 1st week

    Regards,
    Johnson

  • Could you give me some feedback for this topic?

  • Hi,

    Apologies for the delay.

    How to  implement the following mechanisms to ensure FFI between ASIL B and QM SW processes on A53 core?

    We recommend customers use a Safe OS such as QNX on the A53 core, as it provides mechanisms to isolate non-safe tasks from safety-critical tasks


    While the proposed methods ensure some level of memory isolation between QM and ASIL tasks, Linux is fundamentally not a safety-certified OS. As a result, QM tasks may end up starving safety-critical tasks, and a crash in a non-safe task could potentially bring down the entire system.

    For safety use cases, customers should either opt for a Safe OS or consider third-party Safe Linux solutions.

    Regards,
    Nihar Potturu