Part Number: AM62A7
ASIL-B and QM processes in A53 Linux share the same kernel, memory, CPU caches, and interrupts. This means that faults or heavy resource use in QM software can affect ASIL-B functions. So, How to implement the following mechanisms to ensure FFI between ASIL B and QM SW processes on A53 core?
(1)Define ASIL B and QM DDR memory regions by configuring bootloader or the Linux device tree;
(2)For hardware-based memory isolation the MMU(for DDR) or MPU(for SRAM) can be used to assign the access rights to ASIL B and QM SW processes of A53 core;
(3)Interrupt Isolation,Inter-core: Configure interrupt controller so that QM-related interrupts are not routed to ASIL B cores. Intra-core : MMU can ensure QM ISR cannot access the ASIL B memory region.
Could TI provide some other feasible mechanisms to meet the software processes isolation requirement?
Thanks.