Part Number: ISOW3080
Hi team,
Quick clarification question from the prelim datasheet:
Table 8.2 calls out a Hi-Z state until VDD is present, which makes sense, but we have an invalid operational state when VDDL is not present.
Is there any more information available on what state the bus is in when VDDL is low? I see the note where it's indicated that IO inputs can cause indetermined output, but is there any information on the output state if only VDD is present, where VDDL, D and DE are both low? I assume that the output would be hi-Z but would like to confirm.
Thanks,
Julius