Part Number: ISOM8110-EP
Other Parts Discussed in Thread: ISO7820, ISO6020, ISO6420, TMUX1101
Hello TI Team,
I need to electrically isolate two control signals generated by an FPGA from the switch-side ground.
The current configuration is:
FPGA (3.3 V logic) → isolation device → switch-side circuit
There are two loads on the isolated side:
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One analog switch
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One BJT used as a switch in an open-collector configuration
Both switches are currently controlled by separate 3.3 V logic signals from the FPGA.
I would like to completely isolate the FPGA ground from the switch-side ground.
Could you please advise on the correct signal path and interface circuit?
My questions are:
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Would the following architecture be appropriate?
FPGA GPIO → digital isolator/optocoupler → isolated-side logic → analog switch / BJT switch
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For these two 3.3 V control signals, would a dual-channel digital isolator be preferable to a dual-channel optocoupler?
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Since one output drives an analog switch and the other drives a BJT in an open-collector configuration, what output/interface circuit should be used after the isolation device?
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What TI device would you recommend for this application?
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What power supplies and grounds should be used on each side of the isolation barrier to ensure that the FPGA ground and switch-side ground remain electrically isolated?
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Are there any important considerations regarding propagation delay, output drive capability, pull-up resistors, and isolation capacitance for this application?
I can provide the schematic and signal timing/frequency if required.
Please suggest the recommended isolation topology and signal path for this application.
